)]}'
{
  "commit": "8d135c96bca1fe537ebf7c98561c4e0db3d846d1",
  "tree": "d14a59717a8d7a37f7d2081f06a5dea9a8174ef1",
  "parents": [
    "b8ee522cacd3509d904ef2a30bdb512e4383b136"
  ],
  "author": {
    "name": "HiFiPhile",
    "email": "admin@hifiphile.com",
    "time": "Sun Oct 11 17:22:15 2026 +0200"
  },
  "committer": {
    "name": "HiFiPhile",
    "email": "admin@hifiphile.com",
    "time": "Sun Oct 11 17:22:15 2026 +0200"
  },
  "message": "ehci: reset the root port only after USBH debounce\n\nThe connect interrupt reset the port immediately and USBH reset it again\nafter its 150 ms debounce. On RT1064 the early reset could leave a HS\ndevice at FS and break reconnects. Let USBH perform the only reset; this\napplies to every EHCI port (ChipIdea on i.MX RT, LPC18/43, MCXN9, RW61x,\nand HPMicro).\n\nChipIdea times the root reset in hardware (16.7 ms with a HS device, 55 ms\nwith a FS device) and ignores an early end-of-reset write. Raise\nENUM_RESET_ROOT_DELAY_MS to 100 ms so the reset has completed before speed\ndetection. This adds 50 ms to root enumeration for all host controllers.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "723f1feb708a0c116bbc2c0080dd7a7ed9b49c0d",
      "old_mode": 33188,
      "old_path": "src/host/usbh.c",
      "new_id": "248c21d01314b3602fe3fbc4e8e072bed5b9596a",
      "new_mode": 33188,
      "new_path": "src/host/usbh.c"
    },
    {
      "type": "modify",
      "old_id": "660c38d8f9135e62cc2ebc3ba41334bb35311b8e",
      "old_mode": 33188,
      "old_path": "src/portable/ehci/ehci.c",
      "new_id": "0d38c9dd830aefac569b8dea70fecd3cd6e38ad9",
      "new_mode": 33188,
      "new_path": "src/portable/ehci/ehci.c"
    }
  ]
}