)]}'
{
  "commit": "b1bae71e2f4013d07fddb4cf96b3a30a30a382ff",
  "tree": "d58680dc8c09a3f702441d890349fd5aabff3715",
  "parents": [
    "6969ed6652da8e1a7833849de614a4db86a3758b"
  ],
  "author": {
    "name": "HiFiPhile",
    "email": "admin@hifiphile.com",
    "time": "Mon Sep 28 22:12:05 2026 +0200"
  },
  "committer": {
    "name": "HiFiPhile",
    "email": "admin@hifiphile.com",
    "time": "Mon Sep 28 22:12:05 2026 +0200"
  },
  "message": "ch32: complete USBHS bus reset on the first SOF\n\nBUS_RST can precede completion of speed negotiation, so it cannot reliably\nreport the negotiated bus speed. Waiting until the first SETUP reports reset\nand SETUP together, allowing task-side reset processing to clear the queued\nSETUP count before the request is handled.\n\nHandle BUS_RST before transfer and SETUP flags, notify RESET_START, reset\nEP0, and discard reset/transaction flags observed in the entry snapshot.\nTemporarily enable SOF interrupts and mark reset completion pending. On the\nfirst SOF, read SPEED_TYPE, report RESET_END once, and disable SOF interrupts.\nSubsequent SOF events use the normal path when USBD enables them again.\n\nThis gives the USB task the interval before the first SETUP to process reset\nwithout changing the core SETUP bookkeeping. It still requires the task to\nrun in that interval. Keep runtime speed selection and OUT toggle filtering\noutside this commit.\n\nValidation:\n- Full example sets passed on NanoCH32V305 and CH32V307: 54 builds.\n- NanoCH32V305 uac2_headset stack size: +96 bytes code, +1 byte BSS.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "abd750fe402ff776257318d14426e7803f532b27",
      "old_mode": 33188,
      "old_path": "src/portable/wch/dcd_ch32_usbhs.c",
      "new_id": "a7c94f534f004b4d597910978d27f87d26cb07a5",
      "new_mode": 33188,
      "new_path": "src/portable/wch/dcd_ch32_usbhs.c"
    }
  ]
}