ehci: reset the root port only after USBH debounce

The connect interrupt reset the port immediately and USBH reset it again
after its 150 ms debounce. On RT1064 the early reset could leave a HS
device at FS and break reconnects. Let USBH perform the only reset; this
applies to every EHCI port (ChipIdea on i.MX RT, LPC18/43, MCXN9, RW61x,
and HPMicro).

ChipIdea times the root reset in hardware (16.7 ms with a HS device, 55 ms
with a FS device) and ignores an early end-of-reset write. Raise
ENUM_RESET_ROOT_DELAY_MS to 100 ms so the reset has completed before speed
detection. This adds 50 ms to root enumeration for all host controllers.