)]}'
{
  "commit": "d6108819d1d41c749b076e250be454c4559cb771",
  "tree": "62bd44e5dc6ca873a9002903177e67d84acc664c",
  "parents": [
    "46fbc42c10b39bfd4ed6c3a90749080fb18103c9"
  ],
  "author": {
    "name": "fbarchard",
    "email": "fbarchard@google.com",
    "time": "Thu Jul 23 13:19:03 2026 -0700"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Thu Jul 23 16:19:03 2026 -0400"
  },
  "message": "Detect Apple M5 Pro / Max (Sotra) super and performance cores (#424)\n\nAdd microarchitecture detection for Apple M5 Pro and M5 Max (Sotra SoC / CPUFAMILY_ARM_SOTRA).\n\n- Add cpuinfo_uarch_sotra_super and cpuinfo_uarch_sotra_performance enums.\n- Detect 15-core (5 Super + 10 Performance) and 18-core (6 Super + 12 Performance) configurations on macOS/XNU.\n- Update tools/cpu-info.c to use consistent spacing for Apple uarch display names.\n\nResolves https://github.com/pytorch/cpuinfo/issues/423",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e52db90ac1fec1576e31ee9a5ce91e491d7aeddb",
      "old_mode": 33188,
      "old_path": "include/cpuinfo.h",
      "new_id": "3e358df0109cc950eb91ab8023657929bc975ce5",
      "new_mode": 33188,
      "new_path": "include/cpuinfo.h"
    },
    {
      "type": "modify",
      "old_id": "ca89023cb3644edccb18f630b91da05bb4757fc6",
      "old_mode": 33188,
      "old_path": "src/arm/mach/init.c",
      "new_id": "6c632dd050609e15a28dfdfd954ee0aaa84da007",
      "new_mode": 33188,
      "new_path": "src/arm/mach/init.c"
    },
    {
      "type": "modify",
      "old_id": "81d136872d47fa7a4fe56f4a7db3f0a359fd40a9",
      "old_mode": 33188,
      "old_path": "tools/cpu-info.c",
      "new_id": "82fd079a238d4a4293fe05371062dc06e70bcdec",
      "new_mode": 33188,
      "new_path": "tools/cpu-info.c"
    }
  ]
}