PLL setup check bug (#796) (#806)
diff --git a/src/rp2_common/hardware_pll/pll.c b/src/rp2_common/hardware_pll/pll.c
index 6cc6184..f1a09d5 100644
--- a/src/rp2_common/hardware_pll/pll.c
+++ b/src/rp2_common/hardware_pll/pll.c
@@ -41,7 +41,7 @@
if ((pll->cs & PLL_CS_LOCK_BITS) &&
(refdiv == (pll->cs & PLL_CS_REFDIV_BITS)) &&
(fbdiv == (pll->fbdiv_int & PLL_FBDIV_INT_BITS)) &&
- (pdiv == (pll->prim & (PLL_PRIM_POSTDIV1_BITS & PLL_PRIM_POSTDIV2_BITS)))) {
+ (pdiv == (pll->prim & (PLL_PRIM_POSTDIV1_BITS | PLL_PRIM_POSTDIV2_BITS)))) {
// do not disrupt PLL that is already correctly configured and operating
return;
}