blob: 0b6db37d58f0fa97c0ce8e7c2871705927707a40 [file] [log] [blame]
/*
* Copyright (c) 2020 Steven Daglish <s.c.daglish@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/l0/stm32l0.dtsi>
/ {
soc {
timers22: timers@40011400 {
compatible = "st,stm32-timers";
reg = <0x40011400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020>;
resets = <&rctl STM32_RESET(APB2, 5U)>;
interrupts = <22 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
#pwm-cells = <3>;
};
};
eeprom: eeprom@8080000{
reg = <0x08080000 DT_SIZE_K(1)>;
};
adc1: adc@40012400 {
temp-channel = <18>;
};
};
};