| /* |
| * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or |
| * an affiliate of Cypress Semiconductor Corporation |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| |
| / { |
| clocks { |
| |
| /* imo */ |
| clk_imo: clk_imo { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <8000000>; |
| status = "okay"; |
| }; |
| |
| /* path mux0 */ |
| path_mux0: path_mux0 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clocks = <&clk_imo>; |
| status = "okay"; |
| }; |
| |
| /* path mux1 */ |
| path_mux1: path_mux1 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clocks = <&clk_imo>; |
| status = "okay"; |
| }; |
| |
| /* path mux2 */ |
| path_mux2: path_mux2 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clocks = <&clk_imo>; |
| status = "disabled"; |
| }; |
| |
| /* path mux3 */ |
| path_mux3: path_mux3 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clocks = <&clk_imo>; |
| status = "disabled"; |
| }; |
| |
| /* path mux4 */ |
| path_mux4: path_mux4 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clocks = <&clk_imo>; |
| status = "disabled"; |
| }; |
| |
| /* fll */ |
| fll0: fll0 { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| /* clock-frequency = <100000000>; */ |
| status = "okay"; |
| }; |
| |
| /* pll0 configuration */ |
| pll0: pll0 { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| /* clock-frequency = <150000000>; */ |
| status = "disabled"; |
| }; |
| |
| /* clk_hf0 */ |
| clk_hf0: clk_hf0 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clock-div = <1>; |
| clocks = <&fll0>; |
| status = "okay"; |
| }; |
| |
| /* clk_hf1 */ |
| clk_hf1: clk_hf1 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clock-div = <1>; |
| clocks = <&path_mux1>; |
| status = "disabled"; |
| }; |
| |
| /* clk_hf2 */ |
| clk_hf2: clk_hf2 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clock-div = <1>; |
| clocks = <&path_mux2>; |
| status = "disabled"; |
| }; |
| |
| /* clk_hf3 */ |
| clk_hf3: clk_hf3 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clock-div = <1>; |
| clocks = <&path_mux3>; |
| status = "disabled"; |
| }; |
| |
| /* clk_hf4 */ |
| clk_hf4: clk_hf4 { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clock-div = <1>; |
| clocks = <&path_mux4>; |
| status = "disabled"; |
| }; |
| |
| /* clk_fast */ |
| clk_fast: clk_fast { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clock-div = <1>; |
| status = "okay"; |
| }; |
| |
| /* clk_slow */ |
| clk_slow: clk_slow { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clock-div = <1>; |
| status = "okay"; |
| }; |
| |
| /* clk_peri */ |
| clk_peri: clk_peri { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clock-div = <1>; |
| status = "okay"; |
| }; |
| }; |
| |
| }; |