/*
 * Copyright (c) 2017 Justin Watson
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <arm/armv7-m.dtsi>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m4";
			reg = <0>;
		};
	};

	sram0: memory@20070000 {
		device_type = "memory";
		compatible = "mmio-sram";
		reg = <0x20070000 0x18000>;
	};

	flash0: flash@80000 {
		reg = <0x00080000 0x80000>;
	};

	soc {
		uart0: uart@400E0800 {
			compatible = "atmel,sam-uart";
			reg = <0x400E0800 0x124>;
			interrupts = <8 0>;
			status = "disabled";
			label = "UART_0";
		};

		usart0: usart@40098000 {
			compatible = "atmel,sam-usart";
			reg = <0x40098000 0x130>;
			interrupts = <17 0>;
			status = "disabled";
			label = "USART_0";
		};

		usart1: usart@4009C000 {
			compatible = "atmel,sam-usart";
			reg = <0x4009C000 0x130>;
			interrupts = <18 0>;
			status = "disabled";
			label = "USART_1";
		};

		usart2: usart@400A0000 {
			compatible = "atmel,sam-usart";
			reg = <0x400A0000 0x130>;
			interrupts = <18 0>;
			status = "disabled";
			label = "USART_2";
		};

		usart3: usart@400A4000 {
			compatible = "atmel,sam-usart";
			reg = <0x400A4000 0x130>;
			interrupts = <20 0>;
			status = "disabled";
			label = "USART_3";
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <4>;
};