/*
 * Copyright (c) 2022 Basalte bv
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <mem.h>
#include <atmel/sam4s.dtsi>

/ {
	soc {
		flash-controller@400e0a00 {
			flash0: flash@400000 {
				reg = <0x00400000 DT_SIZE_K(1024)>;
				erase-blocks = <&eefc 8 2048>, <&eefc 252 4096>;
			};
		};

		sram0: memory@20100000 {
			reg = <0x20100000 DT_SIZE_K(160)>;
		};
	};
};