/*
 * Copyright (c) 2017 Linaro Limited
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <st/f3/stm32f3.dtsi>

/ {
	soc {
		pinctrl: pin-controller@48000000 {
			gpioe: gpio@48001000 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x48001000 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00200000>;
				label = "GPIOE";
			};
		};

		i2c2: i2c@40005800 {
			compatible = "st,stm32-i2c-v2";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40005800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
			interrupts = <33 0>, <34 0>;
			interrupt-names = "event", "error";
			status = "disabled";
			label= "I2C_2";
		};

		spi2: spi@40003800 {
			compatible = "st,stm32-spi-fifo";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40003800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
			interrupts = <36 5>;
			status = "disabled";
			label = "SPI_2";
		};

		spi3: spi@40003c00 {
			compatible = "st,stm32-spi-fifo";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40003c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
			interrupts = <51 5>;
			status = "disabled";
			label = "SPI_3";
		};

		timers4: timers@40000800 {
			compatible = "st,stm32-timers";
			reg = <0x40000800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000004>;
			status = "disabled";
			label = "TIMERS_4";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_4";
				#pwm-cells = <2>;
			};
		};

		timers5: timers@40000c00 {
			compatible = "st,stm32-timers";
			reg = <0x40000c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000008>;
			status = "disabled";
			label = "TIMERS_5";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <0>;
				label = "PWM_5";
				#pwm-cells = <2>;
			};
		};

		timers12: timers@40001800 {
			compatible = "st,stm32-timers";
			reg = <0x40001800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000040>;
			status = "disabled";
			label = "TIMERS_12";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_12";
				#pwm-cells = <2>;
			};
		};

		timers13: timers@40001c00 {
			compatible = "st,stm32-timers";
			reg = <0x40001c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000080>;
			status = "disabled";
			label = "TIMERS_13";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_13";
				#pwm-cells = <2>;
			};
		};

		timers14: timers@40002000 {
			compatible = "st,stm32-timers";
			reg = <0x40002000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000100>;
			status = "disabled";
			label = "TIMERS_14";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_14";
				#pwm-cells = <2>;
			};
		};

		timers18: timers@40009c00 {
			compatible = "st,stm32-timers";
			reg = <0x40009c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000200>;
			status = "disabled";
			label = "TIMERS_18";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_18";
				#pwm-cells = <2>;
			};
		};

		timers19: timers@40015c00 {
			compatible = "st,stm32-timers";
			reg = <0x40015c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00080000>;
			status = "disabled";
			label = "TIMERS_19";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_19";
				#pwm-cells = <2>;
			};
		};
	};
};