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{
  "commit": "1927b3d02038b9f82f04530e613db007aec1a409",
  "tree": "429f9c1ee0c63243299932ef0b66cbfc7242e7d9",
  "parents": [
    "8ac992bfcd2bec7c78dd0ee2ebd82908fb2e6a29"
  ],
  "author": {
    "name": "Andrew Boie",
    "email": "andrew.p.boie@intel.com",
    "time": "Wed Feb 08 17:16:29 2017 -0800"
  },
  "committer": {
    "name": "Anas Nashif",
    "email": "nashif@linux.intel.com",
    "time": "Sat Feb 11 01:27:58 2017 +0000"
  },
  "message": "gen_isr_tables: New static interrupt build mechanism\n\nThis is a new mechanism for generating interrupt tables which will\nbe useful on many architectures. It replaces the old linker-based\nmechanism for creating these tables and has a couple advantages:\n\n 1) It is now possible to use enums as the IRQ line argument to\n    IRQ_CONNECT(), which should ease CMSIS integration.\n 2) The vector table itself is now generated, which lets us place\n    interrupts directly into the vector table without having to\n    hard-code them. This is a feature we have long enjoyed on x86\n    and will enable \u0027direct\u0027 interrupts.\n 3) More code is common, requiring less arch-specific code to\n    support.\n\nThis patch introduces the common code for this mechanism. Follow-up\npatches will enable it on various arches.\n\nIssue: ZEP-1038, ZEP-1165\nChange-Id: I9acd6e0de8b438fa9293f2e00563628f7510168a\nSigned-off-by: Andrew Boie \u003candrew.p.boie@intel.com\u003e\n",
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