blob: a20c919c5d9dbf2cf8c43f0249815fa5da6193be [file] [log] [blame]
/*
*
* Copyright (c) 2023 Benjamin Björnsson <benjamin.bjornsson@gmail.com>.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <stm32_ll_bus.h>
#include <stm32_ll_crs.h>
#include <stm32_ll_rcc.h>
#include <stm32_ll_utils.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/sys/util.h>
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
#include "clock_stm32_ll_common.h"
/**
* @brief Activate default clocks
*/
void config_enable_default_clocks(void)
{
/* Enable the power interface clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
#if IS_ENABLED(STM32_HSI48_CRS_USB_SOF)
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CRS);
LL_CRS_SetSyncSignalSource(LL_CRS_SYNC_SOURCE_USB);
LL_CRS_EnableAutoTrimming();
LL_CRS_EnableFreqErrorCounter();
#endif
}