/*
 * Copyright 2022 Valerio Setti <vsetti@baylibre.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_QDEC_STM32_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_QDEC_STM32_H_

#define NO_FILTER	0
#define FDIV1_N2	1
#define FDIV1_N4	2
#define FDIV1_N8	3
#define FDIV2_N6	4
#define FDIV2_N8	5
#define FDIV4_N6	6
#define FDIV4_N8	7
#define FDIV8_N6	8
#define FDIV8_N8	9
#define FDIV16_N5	10
#define FDIV16_N6	11
#define FDIV16_N8	12
#define FDIV32_N5	13
#define FDIV32_N6	14
#define FDIV32_N8	15

#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_QDEC_STM32_H_ */