#
# NXP LPCXpresso11U68 (evaluation board OM13058)
#
# http://www.nxp.com/board/OM13058.html
# https://www.embeddedartists.com/products/lpc11u68-lpcxpresso/
# https://os.mbed.com/platforms/LPCXpresso11U68/
#

# The on-board LPC-Link2 debug probe (based on a NXP LPC43xx MCU) provides
# either a CMSIS-DAP or a J-Link interface. It depends on the version of the
# embedded firmware. Uncomment the line corresponding to yours.
source [find interface/cmsis-dap.cfg]
# source [find interface/jlink.cfg]

# NXP LPC11U68 Cortex-M0 with 256kB flash and 32kB + 4kB SRAM.
set WORKAREASIZE 0x5000

source [find target/lpc11xx.cfg]

# This ensures that the interrupt vectors (0x0000-0x0200) are re-mapped to
# flash after the "reset halt" command. Else the load/verify functions won't
# work correctly.
#
# Table 8. System memory remap register (SYSMEMREMAP, address 0x40048000) bit
#          description
# Bit Symbol Value Description
# 1:0 MAP          System memory remap
#            0x0   Boot Loader Mode. Interrupt vectors are re-mapped to
#            Boot ROM.
#            0x1   User RAM Mode. Interrupt vectors are re-mapped to
#            Static RAM.
#            0x2   User Flash Mode. Interrupt vectors are not re-mapped
#            and reside in Flash.
# 31:2 -     -     Reserved.
$_TARGETNAME configure -event reset-end {
	 mww 0x40048000 0x02
}

# Enable Zephyr thread awareness.
$_TARGETNAME configure -rtos Zephyr

adapter_khz 100