/*
 * Copyright (c) 2017 Florian Vaussard, HEIG-VD
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <st/stm32f413-pinctrl.dtsi>
#include <st/stm32f411.dtsi>

/ {
	soc {
		usart3: serial@40004800 {
			compatible = "st,stm32-usart", "st,stm32-uart";
			reg = <0x40004800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
			interrupts = <39 0>;
			status = "disabled";
			label = "UART_3";
		};

		uart4: serial@40004c00 {
			compatible ="st,stm32-uart";
			reg = <0x40004c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
			interrupts = <52 0>;
			status = "disabled";
			label = "UART_4";
		};

		uart5: serial@40005000 {
			compatible = "st,stm32-uart";
			reg = <0x40005000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
			interrupts = <53 0>;
			status = "disabled";
			label = "UART_5";
		};

		uart7: serial@40007800 {
			compatible = "st,stm32-uart";
			reg = <0x40007800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>;
			interrupts = <82 0>;
			status = "disabled";
			label = "UART_7";
		};

		uart8: serial@40007c00 {
			compatible = "st,stm32-uart";
			reg = <0x40007c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>;
			interrupts = <83 0>;
			status = "disabled";
			label = "UART_8";
		};

		uart9: serial@40011800 {
			compatible = "st,stm32-uart";
			reg = <0x40011800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000040>;
			interrupts = <88 0>;
			status = "disabled";
			label = "UART_9";
		};

		uart10: serial@40011c00 {
			compatible = "st,stm32-uart";
			reg = <0x40011c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000080>;
			interrupts = <89 0>;
			status = "disabled";
			label = "UART_10";
		};
	};
};