)]}'
{
  "commit": "358a61e83cbb88f8033643a01bc0132a0c978d97",
  "tree": "01e878fa993fddabc0b228c3f31059b6a0be95b3",
  "parents": [
    "98fcff650834d889898e652236e8edb32fb68475"
  ],
  "author": {
    "name": "Mulin Chao",
    "email": "mlchao@nuvoton.com",
    "time": "Tue Apr 27 20:56:33 2021 -0700"
  },
  "committer": {
    "name": "Carles Cufí",
    "email": "carles.cufi@nordicsemi.no",
    "time": "Mon Jun 07 12:06:33 2021 +0200"
  },
  "message": "soc: npcx: extend group field of struct npcx_alt to 8-bit\n\nIn npcx9, the number of pinmux registers (DEVALTx) is more than 16. We\nneed to extend the \"group\" member in the struct npcx_ALT to configure\nthe pinmux settings in npcx9.\n\nSigned-off-by: Jun Lin \u003cCHLin56@nuvoton.com\u003e\nSigned-off-by: Mulin Chao \u003cmlchao@nuvoton.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7bcc270d8707c15b538bee8640c3d60943f99b39",
      "old_mode": 33188,
      "old_path": "soc/arm/nuvoton_npcx/common/soc_pins.h",
      "new_id": "ecde87772829577e501d58db83ed28096faa86fa",
      "new_mode": 33188,
      "new_path": "soc/arm/nuvoton_npcx/common/soc_pins.h"
    }
  ]
}