)]}'
{
  "commit": "38276101b8dda214cc9ecd6042942e36f06e170c",
  "tree": "12ddb791483c981e95f204792c4dcce68fd39c0f",
  "parents": [
    "76edf8a68115b20ec3c547fd45b1500b265e5f35"
  ],
  "author": {
    "name": "Adithya Baglody",
    "email": "adithya.nagaraj.baglody@intel.com",
    "time": "Wed Sep 20 11:52:32 2017 +0530"
  },
  "committer": {
    "name": "Andrew Boie",
    "email": "andrewboie@gmail.com",
    "time": "Mon Oct 23 10:13:07 2017 -0700"
  },
  "message": "qemu: x86: Enable the \u0027Execute Disable\u0027 capability of the PAE pages.\n\nPage Address Extension(PAE) page tables make use of NXE bit in\nEFER register.\nThis patch enables the capability needed to set this bit.\n\nSigned-off-by: Adithya Baglody \u003cadithya.nagaraj.baglody@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e1dfbcdc5e464e07325803c6a2819137d6ad36a9",
      "old_mode": 33188,
      "old_path": "boards/x86/qemu_x86/Makefile.board",
      "new_id": "1844671a9ebefd35bf72aa6f258c836e3d2d1560",
      "new_mode": 33188,
      "new_path": "boards/x86/qemu_x86/Makefile.board"
    }
  ]
}