blob: 5118a0b2b9e059b59ce599ed9dab9cb458bf0da9 [file] [log] [blame]
# SPDX-License-Identifier: Apache-2.0
CONFIG_ARM=y
CONFIG_BOARD_96B_STM32_SENSOR_MEZ=y
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F446XE=y
# 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
# Enable MPU
CONFIG_ARM_MPU=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable pinmux
CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y
# clock configuration
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
CONFIG_CLOCK_STM32_HSE_CLOCK=16000000
# produce 84MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=84
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
# APB1 clock must not exceed 50MHz limit
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1