)]}'
{
  "commit": "3f3c72a9113213c22fcd956c832d4672876889c7",
  "tree": "929c7a7b12f0a59fcc46d3ccd2faf79673d9a82a",
  "parents": [
    "a3f97e853e3ce967aa084c2c011ecf760f30313a"
  ],
  "author": {
    "name": "Anas Nashif",
    "email": "anas.nashif@intel.com",
    "time": "Tue Jan 14 20:45:20 2020 -0500"
  },
  "committer": {
    "name": "Anas Nashif",
    "email": "anas.nashif@intel.com",
    "time": "Wed Jan 15 12:05:44 2020 -0500"
  },
  "message": "x86: qemu_x86_64: workaround SMP issues in x86\n\nWe have some races causing random failures with this platform, set cpu\nnumber to one while we investigate and fix the issue.\n\nRelated to #21317\n\nSigned-off-by: Anas Nashif \u003canas.nashif@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "9fc505e6d30817be41931ae235a3aa397c928032",
      "old_mode": 33188,
      "old_path": "boards/x86/qemu_x86/qemu_x86_64_defconfig",
      "new_id": "1b147625bbb456171c5e7638b467ef115a4b50b3",
      "new_mode": 33188,
      "new_path": "boards/x86/qemu_x86/qemu_x86_64_defconfig"
    }
  ]
}