)]}'
{
  "commit": "3f90574ad3d3700d04be056898c80e84df41a170",
  "tree": "3e0760db05b410106823f1546d86d59fe3cf83ad",
  "parents": [
    "1078e59a138eeeb10e93ba9f12ffa1fb751f01ee"
  ],
  "author": {
    "name": "Łukasz Stępnicki",
    "email": "lukasz.stepnicki@nordicsemi.no",
    "time": "Wed Nov 05 16:12:11 2025 +0100"
  },
  "committer": {
    "name": "Johan Hedberg",
    "email": "johan.hedberg@gmail.com",
    "time": "Fri Nov 07 19:22:58 2025 +0200"
  },
  "message": "soc: nordic: vpr: align ESF_SW_IRQ_SIZEOF when new exception debug is used\n\nThere is new exception debugging mechanism for RISC-V which needs\nadditional member in arch_esf structure. VPRs handle stacking\npartially in hw so exact position of some stack members needs\nto be at the end of arch_esf, so explicit padding is needed.\nAligned also ESF_SW_IRQ_SIZEOF when exception debug is used.\n\nSigned-off-by: Łukasz Stępnicki \u003clukasz.stepnicki@nordicsemi.no\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "db7d4a215e2c549729710cef022f9d413066584e",
      "old_mode": 33188,
      "old_path": "soc/nordic/common/vpr/soc_isr_stacking.h",
      "new_id": "c80105d6acbfc9e042d26fc876fe2e31c8408ec8",
      "new_mode": 33188,
      "new_path": "soc/nordic/common/vpr/soc_isr_stacking.h"
    }
  ]
}
