tree 75400a388cf0ac1d9ccde9ef443cb95b294192e5
parent 6043c74fd389c7eca990ee2c119b87cad3772770
author Maureen Helm <maureen.helm@nxp.com> 1502480560 -0500
committer Kumar Gala <kumar.gala@gmail.com> 1510758598 -0600

arm: Introduce NXP i.MX family, RT series, and mimxrt1052 SoC

Adds the mimxrt1052 SoC, which belongs to a new family (nxp_imx) and
series (rt) of SoCs. The mimxrt1052 integrates an Arm Cortex-M7 core,
512 KB TCM, and many peripherals including 2D graphics, an LCD display
controller, camera interface, SPDIF and I2S. Unlike other SoCs in
Zephyr, the mimxrt1052 has no internal flash.

This initial port to mimxrt1052 configures the system clock to operate
at 528 MHz, and enables the serial/uart and gpio interfaces to support
the hello_world and blinky samples. Support for additional Zephyr driver
interfaces will come later.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>