tree 5069e298804cc7b4f02c846640f63e6100ebaf96
parent cd86ec2655ffe9fc8f32e2b13bafb5e1cbbc6ddc
author Volodymyr Babchuk <volodymyr_babchuk@epam.com> 1605819437 +0200
committer Anas Nashif <anas.nashif@intel.com> 1611514795 -0500

aarch64: introduce explicit instructions to access MMIO

With classic volatile pointer access gcc something generates
access instructions with immediate offset value, like

str     w4, [x1], #4

Such instructions produce invalid syndrome in HSR register when are
trapped by hypervisor. This leads to inability to emulate device access
in hypervisor.

So we need to make sure that any access to device memory is done
with plain str/ldr instructions without offset.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>