/*
 * Copyright (c) 2021 Linaro Limited
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/*
 * Warning: This overlay performs configuration from clean sheet.
 * It is assumed that it is applied after core_init.overlay file.
 */

&clk_msik {
	msi-range = <4>;
	status = "okay";
};

&spi1 {
	/delete-property/ clocks;
	clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
			<&rcc STM32_SRC_MSIK SPI1_SEL(3)>;
	status = "okay";
};