dts/arm/intel_socfpga_std/socfpga_cyclone5.dtsi

/*
 * SPDX-License-Identifier: Apache-2.0
 * Copyright (C) 2022, Intel Corporation
 * Description:
 * Device Tree Source modified for Zephyr
 * provides support for Cyclone V SoC DevKit
 */

/dts-v1/;
/memreserve/ 0x00000000 0x0001000;
#include "socfpga.dtsi"

/ {
	soc {
		clkmgr@ffd04000 {
			clocks {
				osc1 {
					clock-frequency = <25000000>;
				};
			};
		};

		sysmgr@ffd08000 {
			/* cpu1-start-addr = <0xffd080c4>; */
		};
	};
};