/*
 * Copyright (c) 2018 qianfan Zhao
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <st/f0/stm32f0.dtsi>

/ {
	soc {
		flash-controller@40022000 {
			flash0: flash@8000000 {
				erase-block-size = <2048>;
			};
		};

		spi2: spi@40003800 {
			compatible = "st,stm32-spi-fifo", "st,stm32-spi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40003800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
			interrupts = <26 3>;
			status = "disabled";
		};

		usb: usb@40005c00 {
			compatible = "st,stm32-usb";
			reg = <0x40005c00 0x400>;
			interrupts = <31 0>;
			interrupt-names = "usb";
			num-bidir-endpoints = <8>;
			ram-size = <1024>;
			phys = <&usb_fs_phy>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>,
				 <&rcc STM32_SRC_PLLCLK USB_SEL(1)>;
			status = "disabled";
		};
	};

	usb_fs_phy: usbphy {
		compatible = "usb-nop-xceiv";
		#phy-cells = <0>;
	};
};