# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
# SPDX-License-Identifier: Apache-2.0

config CLIC
	bool "RISC-V Core Local Interrupt Controller (CLIC)"
	default y
	depends on DT_HAS_NUCLEI_ECLIC_ENABLED || DT_HAS_RISCV_CLIC_ENABLED
	select RISCV_SOC_HAS_CUSTOM_IRQ_HANDLING
	help
	  Core Local Interrupt Controller provide low-latency, vectored,
	  preemptive interrupts for RISC-V systems.

config NUCLEI_ECLIC
	bool "Enhanced Core Local Interrupt Controller (ECLIC)"
	default y
	depends on DT_HAS_NUCLEI_ECLIC_ENABLED
	select CLIC
	select CLIC_SMCLICSHV_EXT if RISCV_VECTORED_MODE
	select CLIC_SMCLICCONFIG_EXT
	select LEGACY_CLIC_MEMORYMAP_ACCESS
	help
	  Interrupt controller for Nuclei SoC core.

config NRFX_CLIC
	bool "VPR Core Local Interrpt Controller (CLIC)"
	default y
	depends on DT_HAS_NORDIC_NRF_CLIC_ENABLED
	select GEN_IRQ_VECTOR_TABLE
	help
	  Interrupt controller for Nordic VPR cores.

if CLIC

config CLIC_SMCLICSHV_EXT
	bool
	help
	  The selective hardware vectoring extension gives users the flexibility
	  to select the behavior for each interrupt. The CLIC driver needs to
	  implement the riscv_clic_irq_vector_set() function.

config CLIC_SMCLICCONFIG_EXT
	bool
	help
	  Enables the SMCLICCONFIG extension, allowing configuration of CLIC
	  parameters such as the number of interrupt level bits.

config CLIC_PARAMETER_INTCTLBITS
	int "The number of modifiable bits in the clicintctl registers"
	range 0 8
	default 8
	help
	  This option specifies the number of modifiable bits in the clicintctl
	  registers.

config CLIC_PARAMETER_MNLBITS
	int "The number of bits in CLICINTCTLBITS to encode the interrupt level"
	range 0 CLIC_PARAMETER_INTCTLBITS
	default 0
	help
	  This option specifies the number of bits in CLICINTCTLBITS assigned to
	  encode the interrupt level at machine mode.

config LEGACY_CLIC_MEMORYMAP_ACCESS
	bool
	help
	  Enables legacy CLIC, allowing access to CLIC registers through
	  memory-mapped access instead of indirect CSR access.

config LEGACY_CLIC
	bool "Use the legacy clic specification"
	depends on RISCV_HAS_CLIC
	help
	  Enables legacy clic, where smclicshv extension is not supported and
	  hardware vectoring is set via mode bits of mtvec.

endif # CLIC