/*
 * Copyright (c) 2022 Georgij Cernysiov
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/*
 * Warning: This overlay performs configuration from clean sheet.
 * It is assumed that it is applied after core_init.overlay file.
 */

&pll3 {
	clocks = <&clk_hse>;
	div-m = <1>;
	mul-n = <24>;
	div-p = <1>;
	status = "okay";
};

&spi1 {
	/delete-property/ clocks;
	clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
		 <&rcc STM32_SRC_PLL2_P SPI123_SEL(1)>;
	status = "okay";
};