commit 5d34891ae00fd6cdf542d50a8ae432fc50df156d
author Jose Alberto Meza <jose.a.meza.arellano@intel.com> Mon Dec 05 19:08:20 2022 -0800
committer Maureen Helm <maureen.helm@intel.com> Wed Dec 07 09:45:25 2022 -0600
tree c405d45f4f7f3b04865d837463da74405db7782c
parent acbe0d3264b55b1ae7da3b9498adc62f39d4330a

soc: arm: microchip: mec172x: Correct PECI base address

Use correct device tree entry

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>

soc/arm/microchip_mec/mec172x/device_power.c

diff --git a/soc/arm/microchip_mec/mec172x/device_power.c b/soc/arm/microchip_mec/mec172x/device_power.c
index 601ce99..cf7d412 100644
--- a/soc/arm/microchip_mec/mec172x/device_power.c
+++ b/soc/arm/microchip_mec/mec172x/device_power.c
@@ -19,7 +19,7 @@
 #define ECS_XEC_REG_BASE						\
 	((struct ecs_regs *)(DT_REG_ADDR(DT_NODELABEL(ecs))))
 #define PECI_XEC_REG_BASE						\
-	((struct peci_regs *)(DT_REG_ADDR(DT_NODELABEL(pcr))))
+	((struct peci_regs *)(DT_REG_ADDR(DT_NODELABEL(peci0))))
 #define PCR_XEC_REG_BASE						\
 	((struct pcr_regs *)(DT_REG_ADDR(DT_NODELABEL(pcr))))
 #define TFDP_0_XEC_REG_BASE						\