/*
 * Copyright (c) 2020 ITE Corporation. All Rights Reserved.
 * Copyright (c) 2019-2020 Jyunlin Chen <jyunlin.chen@ite.com.tw>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <mem.h>
#include <dt-bindings/interrupt-controller/ite-intc.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "ite,riscv-ite";
			device_type = "cpu";
			reg = <0>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		flashctrl: flash-controller@80000000 {
			compatible = "ite,it8xxx2-flash-controller";
			reg = <0x80000000 0x100>;
			label = "fspi";
			#address-cells = <1>;
			#size-cells = <1>;

			flash0: flash@80000000 {
				compatible = "soc-nv-flash";
				reg = <0x80000000 DT_SIZE_M(1)>;
				erase-block-size = <4096>;
				write-block-size = <4>;
			};
		};
		pinmuxa: pinmux@f01610 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01610 0x0008>;
			label = "PINMUXA";
			func3_gcr =     <NO_FUNC  NO_FUNC  NO_FUNC  NO_FUNC
					 0xf02032 0xf02032 0xf016f0 0xf016f0>;
			func3_en_mask = <0        0        0        0
					 0x02     0x02     0x10     0x0C    >;
			func4_gcr =     <NO_FUNC  NO_FUNC  NO_FUNC  NO_FUNC
					 NO_FUNC  NO_FUNC  NO_FUNC  NO_FUNC >;
			func4_en_mask = <0        0        0        0
					 0        0        0        0       >;
		};
		pinmuxb: pinmux@f01618 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01618 0x0008>;
			label = "PINMUXB";
			func3_gcr =     <0xf016f5 0xf016f5 NO_FUNC NO_FUNC
					 NO_FUNC  NO_FUNC  NO_FUNC 0xf01600>;
			func3_en_mask = <0x01     0x02     0       0
					 0        0        0       0x02    >;
			func4_gcr =     <NO_FUNC  NO_FUNC  NO_FUNC NO_FUNC
					 NO_FUNC  NO_FUNC  NO_FUNC 0xf016f1>;
			func4_en_mask = <0        0        0       0
					 0        0        0       0x40    >;
		};
		pinmuxc: pinmux@f01620 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01620 0x0008>;
			label = "PINMUXC";
			func3_gcr =     <NO_FUNC NO_FUNC  NO_FUNC 0xf016f0
					 NO_FUNC 0xf016f0 NO_FUNC 0xf016f3>;
			func3_en_mask = <0       0        0       0x10
					 0       0x10     0       0x02    >;
			func4_gcr =     <NO_FUNC NO_FUNC  NO_FUNC NO_FUNC
					 NO_FUNC NO_FUNC  NO_FUNC 0xf016f6>;
			func4_en_mask = <0       0        0       0
					 0       0        0       0x80    >;
		};
		pinmuxd: pinmux@f01628 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01628 0x0008>;
			label = "PINMUXD";
			func3_gcr =     <NO_FUNC NO_FUNC  NO_FUNC NO_FUNC
					 NO_FUNC 0xf016f0 NO_FUNC NO_FUNC>;
			func3_en_mask = <0       0        0       0
					 0       0x02     0       0      >;
			func4_gcr =     <NO_FUNC NO_FUNC  NO_FUNC NO_FUNC
					 NO_FUNC NO_FUNC  NO_FUNC NO_FUNC>;
			func4_en_mask = <0       0        0       0
					 0       0        0       0      >;
		};
		pinmuxe: pinmux@f01630 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01630 0x0008>;
			label = "PINMUXE";
			func3_gcr =     <0xf02032 NO_FUNC  NO_FUNC NO_FUNC
					 NO_FUNC  0xf016f0 NO_FUNC 0xf02032>;
			func3_en_mask = <0x01     0        0       0
					 0        0x08     0       0x01    >;
			func4_gcr =     <0xf016f3 NO_FUNC  NO_FUNC NO_FUNC
					 NO_FUNC  NO_FUNC  NO_FUNC NO_FUNC >;
			func4_en_mask = <0x01     0        0       0
					 0        0        0       0       >;
		};
		pinmuxf: pinmux@f01638 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01638 0x0008>;
			label = "PINMUXF";
			func3_gcr =     <NO_FUNC NO_FUNC 0xf016f0 0xf016f0
					 NO_FUNC NO_FUNC 0xf016f1 0xf016f1>;
			func3_en_mask = <0       0       0x02     0x02
					 0       0       0x10     0x10    >;
			func4_gcr =     <NO_FUNC NO_FUNC 0xf016f1 0xf016f1
					 NO_FUNC NO_FUNC NO_FUNC  NO_FUNC >;
			func4_en_mask = <0       0       0x20     0x20
					 0       0       0        0       >;
		};
		pinmuxg: pinmux@f01640 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01640 0x0008>;
			label = "PINMUXG";
			func3_gcr =     <0xf016f0 0xf016f0 0xf016f0 NO_FUNC
					 NO_FUNC  NO_FUNC  0xf016f0 NO_FUNC>;
			func3_en_mask = <0x20     0x08     0x10     0
					 0        0        0x02     0      >;
			func4_gcr =     <NO_FUNC  NO_FUNC  NO_FUNC  NO_FUNC
					 NO_FUNC  NO_FUNC  NO_FUNC  NO_FUNC>;
			func4_en_mask = <0        0        0        0
					 0        0        0        0      >;
		};
		pinmuxh: pinmux@f01648 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01648 0x0008>;
			label = "PINMUXH";
			func3_gcr =     <NO_FUNC 0xf016f1 0xf016f1 NO_FUNC
					 NO_FUNC 0xf016f5 0xf016f5 NO_FUNC>;
			func3_en_mask = <0       0x20     0x20     0
					 0       0x04     0x08     0      >;
			func4_gcr =     <NO_FUNC 0xf016f5 0xf016f5 NO_FUNC
					 NO_FUNC NO_FUNC  NO_FUNC  NO_FUNC>;
			func4_en_mask = <0       0x04     0x08     0
					 0       0        0        0      >;
		};
		pinmuxi: pinmux@f01650 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01650 0x0008>;
			label = "PINMUXI";
			func3_gcr =     <NO_FUNC NO_FUNC  NO_FUNC  NO_FUNC
					 NO_FUNC 0xf016f0 0xf016f0 0xf016f0>;
			func3_en_mask = <0       0        0        0
					 0       0x08     0x08     0x08    >;
			func4_gcr =     <NO_FUNC NO_FUNC  NO_FUNC  NO_FUNC
					 NO_FUNC NO_FUNC  NO_FUNC  NO_FUNC >;
			func4_en_mask = <0       0        0        0
					 0       0        0        0       >;
		};
		pinmuxj: pinmux@f01658 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01658 0x0008>;
			label = "PINMUXJ";
			func3_gcr =     <0xf016f4 NO_FUNC  0xf016f4 0xf016f4
					 0xf016f0 0xf016f0 NO_FUNC  NO_FUNC>;
			func3_en_mask = <0x01     0        0x01     0x02
					 0x02     0x03     0        0      >;
			func4_gcr =     <NO_FUNC  NO_FUNC  NO_FUNC  NO_FUNC
					 NO_FUNC  NO_FUNC  NO_FUNC  NO_FUNC>;
			func4_en_mask = <0        0        0        0
					 0        0        0        0      >;
		};
		pinmuxk: pinmux@f01690 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01690 0x0008>;
			label = "PINMUXK";
			func3_gcr =     <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
					 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
			func3_en_mask = <0       0       0       0
					 0       0       0       0      >;
			func4_gcr =     <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
					 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
			func4_en_mask = <0       0       0       0
					 0       0       0       0      >;
		};
		pinmuxl: pinmux@f01698 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f01698 0x0008>;
			label = "PINMUXL";
			func3_gcr =     <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
					 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
			func3_en_mask = <0       0       0       0
					 0       0       0       0      >;
			func4_gcr =     <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
					 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
			func4_en_mask = <0       0       0       0
					 0       0       0       0      >;
		};
		pinmuxm: pinmux@f016a0 {
			compatible = "ite,it8xxx2-pinmux";
			reg = <0x00f016a0 0x0008>;
			label = "PINMUXM";
			func3_gcr =     <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
					 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
			func3_en_mask = <0       0       0       0
					 0       0       0       0      >;
			func4_gcr =     <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
					 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
			func4_en_mask = <0       0       0       0
					 0       0       0       0      >;
		};
		sram0: memory@80100000 {
			compatible = "mmio-sram";
			reg = <0x80100000 DT_SIZE_K(60)>;
		};
		intc: interrupt-controller@f03f00 {
			#interrupt-cells = <2>;
			compatible = "ite,it8xxx2-intc";
			interrupt-controller;
			reg = <0x00f03f00 0x0100>;
		};
		uart1: uart@f02700 {
			compatible = "ns16550";
			reg = <0x00f02700 0x0020>;
			status = "disabled";
			label = "console";
			current-speed = <115200>;
			clock-frequency = <1804800>;
			interrupts = <38 IRQ_TYPE_EDGE_RISING>;
			interrupt-parent = <&intc>;
		};
		uart2: uart@f02800 {
			compatible = "ns16550";
			reg = <0x00f02800 0x0020>;
			status = "disabled";
			label = "UART_2";
			current-speed = <460800>;
			clock-frequency = <1804800>;
			interrupts = <39 IRQ_TYPE_EDGE_RISING>;
			interrupt-parent = <&intc>;
		};
		timer: timer@f01f00 {
			compatible = "ite,it8xxx2-timer";
			reg = <0x00f01f00 0x0062>;
			label = "sys_clock";
			interrupts = <0 IRQ_TYPE_NONE
				30 IRQ_TYPE_EDGE_RISING
				58 IRQ_TYPE_EDGE_RISING
				155 IRQ_TYPE_EDGE_FALLING
				156 IRQ_TYPE_EDGE_FALLING
				157 IRQ_TYPE_EDGE_FALLING
				158 IRQ_TYPE_EDGE_FALLING
				159 IRQ_TYPE_EDGE_FALLING
				80 IRQ_TYPE_EDGE_RISING>;
			interrupt-parent = <&intc>;
		};

		gpioa: gpio@f01601 {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f01601 1   /* GPDR (set) */
			       0x00f01610 8   /* GPCR */
			       0x00f01661 1   /* GPDMR (get) */
			       0x00f01671 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_A";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU91 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU92 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU93 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU80 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU81 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU82 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU83 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU100 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpiob: gpio@f01602 {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f01602 1   /* GPDR (set) */
			       0x00f01618 8   /* GPCR */
			       0x00f01662 1   /* GPDMR (get) */
			       0x00f01672 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_B";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU101 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU102 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU84 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU103 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU94 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU104 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU105 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU106 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpioc: gpio@f01603 {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f01603 1   /* GPDR (set) */
			       0x00f01620 8   /* GPCR */
			       0x00f01663 1   /* GPDMR (get) */
			       0x00f01673 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_C";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU85 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU107 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU95 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU108 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU22 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU109 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU23 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU86 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpiod: gpio@f01604 {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f01604 1   /* GPDR (set) */
			       0x00f01628 8   /* GPCR */
			       0x00f01664 1   /* GPDMR (get) */
			       0x00f01674 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_D";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU20 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU21 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU24 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU110 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU111 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU112 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU113 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU87 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpioe: gpio@f01605 {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f01605 1   /* GPDR (set) */
			       0x00f01630 8   /* GPCR */
			       0x00f01665 1   /* GPDMR (get) */
			       0x00f01675 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_E";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU70 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU71 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU72 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU73 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU114 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU40 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU45 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU46 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpiof: gpio@f01606 {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f01606 1   /* GPDR (set) */
			       0x00f01638 8   /* GPCR */
			       0x00f01666 1   /* GPDMR (get) */
			       0x00f01676 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_F";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU96 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU97 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU98 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU99 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU64 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU65 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU66 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU67 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpiog: gpio@f01607 {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f01607 1   /* GPDR (set) */
			       0x00f01640 8   /* GPCR */
			       0x00f01667 1   /* GPDMR (get) */
			       0x00f01677 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_G";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU115 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU116 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU117 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU123 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU124 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU125 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU118 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU126 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpioh: gpio@f01608 {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f01608 1   /* GPDR (set) */
			       0x00f01648 8   /* GPCR */
			       0x00f01668 1   /* GPDMR (get) */
			       0x00f01678 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_H";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU60 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU61 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU62 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU63 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU88 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU89 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU90 IRQ_TYPE_LEVEL_HIGH
				0 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpioi: gpio@f01609 {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f01609 1   /* GPDR (set) */
			       0x00f01650 8   /* GPCR */
			       0x00f01669 1   /* GPDMR (get) */
			       0x00f01679 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_I";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU119 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU120 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU121 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU122 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU74 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU75 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU76 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU77 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpioj: gpio@f0160a {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f0160a 1   /* GPDR (set) */
			       0x00f01658 8   /* GPCR */
			       0x00f0166a 1   /* GPDMR (get) */
			       0x00f0167a 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_J";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU128 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU129 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU130 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU131 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU132 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU133 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU134 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU135 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpiok: gpio@f0160b {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f0160b 1   /* GPDR (set) */
			       0x00f01690 8   /* GPCR */
			       0x00f0166b 1   /* GPDMR (get) */
			       0x00f0167b 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_K";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU50 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU51 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU52 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU53 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU54 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU55 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU56 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU57 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpiol: gpio@f0160c {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f0160c 1   /* GPDR (set) */
			       0x00f01698 8   /* GPCR */
			       0x00f0166c 1   /* GPDMR (get) */
			       0x00f0167c 1>; /* GPOTR */
			ngpios = <8>;
			label = "GPIO_L";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU136 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU137 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU138 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU139 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU140 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU141 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU142 IRQ_TYPE_LEVEL_HIGH
				      IT8XXX2_IRQ_WU143 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		gpiom: gpio@f0160d {
			compatible = "ite,it8xxx2-gpio";
			reg = <0x00f0160d 1   /* GPDR (set) */
			       0x00f016a0 8   /* GPCR */
			       0x00f0166d 1   /* GPDMR (get) */
			       0x00f0167d 1>; /* GPOTR */
			ngpios = <7>;
			label = "GPIO_M";
			gpio-controller;
			interrupts = <IT8XXX2_IRQ_WU144 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU145 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU146 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU147 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU148 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU149 IRQ_TYPE_LEVEL_HIGH
				IT8XXX2_IRQ_WU150 IRQ_TYPE_LEVEL_HIGH
				0 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&intc>;
			#gpio-cells = <2>;
		};

		spi0:spi@f02600  {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "ite,it8xxx2-sspi";
			reg = <0x00f02600 0x40>;
			label = "SPI0";
			interrupt-parent = <&intc>;
			interrupts = <37 IRQ_TYPE_EDGE_RISING>;
			clock-frequency = <115200>;
		};
		spi1:spi@f02640  {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "ite,it8xxx2-sspi";
			reg = <0x00f02640 0x40>;
			label = "SPI1";
			interrupts = <37 IRQ_TYPE_EDGE_RISING>;
			interrupt-parent = <&intc>;
			status = "okay";
		};
		adc0: adc@f01900 {
			compatible = "ite,it8xxx2-adc";
			reg = <0xf01900 0x45>;
			interrupts = <8 IRQ_TYPE_NONE>;
			interrupt-parent = <&intc>;
			status = "disabled";
			label = "ADC_0";
			#io-channel-cells = <1>;
		};
		i2c0: i2c@f01c40 {
			compatible = "ite,it8xxx2-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x00f01c40 0x0040>;
			interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
			interrupt-parent = <&intc>;
			status = "disabled";
			label = "I2C_0";
			port-num = <0>;
		};
		i2c1: i2c@f01c80 {
			compatible = "ite,it8xxx2-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x00f01c80 0x0040>;
			interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
			interrupt-parent = <&intc>;
			status = "disabled";
			label = "I2C_1";
			port-num = <1>;
		};
		i2c2: i2c@f01cc0 {
			compatible = "ite,it8xxx2-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x00f01cc0 0x0040>;
			interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
			interrupt-parent = <&intc>;
			status = "disabled";
			label = "I2C_2";
			port-num = <2>;
		};
		i2c3: i2c@f03680 {
			compatible = "ite,it8xxx2-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x00f03680 0x0080>;
			interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
			interrupt-parent = <&intc>;
			status = "disabled";
			label = "I2C_3";
			port-num = <3>;
		};
		i2c4: i2c@f03500 {
			compatible = "ite,it8xxx2-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x00f03500 0x0080>;
			interrupts = <152 IRQ_TYPE_EDGE_FALLING>;
			interrupt-parent = <&intc>;
			status = "disabled";
			label = "I2C_4";
			port-num = <4>;
		};
		i2c5: i2c@f03580 {
			compatible = "ite,it8xxx2-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x00f03580 0x0080>;
			interrupts = <153 IRQ_TYPE_EDGE_FALLING>;
			interrupt-parent = <&intc>;
			status = "disabled";
			label = "I2C_5";
			port-num = <5>;
		};
	};
};