)]}'
{
  "commit": "6ad1f411c34370a76600ea07eb0f856f333791a5",
  "tree": "db11dd64ee3cd15e435d6243a0925419e86af57e",
  "parents": [
    "d31a1dc91b1cea78dc0820fea5b9b4505c4beb06"
  ],
  "author": {
    "name": "Henrik Brix Andersen",
    "email": "henrik@brixandersen.dk",
    "time": "Tue Oct 13 11:19:34 2020 +0200"
  },
  "committer": {
    "name": "Anas Nashif",
    "email": "anas.nashif@intel.com",
    "time": "Tue Nov 17 19:30:20 2020 -0500"
  },
  "message": "tests: drivers: counter: basic_api: add support for Xilinx AXI Timer IP\n\nAdd support for testing the Xilinx AXI Timer IP.\n\nSigned-off-by: Henrik Brix Andersen \u003chenrik@brixandersen.dk\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "798df17439b2cd1d5ddb546062ad94cd04c2f6c2",
      "old_mode": 33188,
      "old_path": "tests/drivers/counter/counter_basic_api/src/test_counter.c",
      "new_id": "05fd1a88ca91fa00f8f7b9bfc0b2a44129525533",
      "new_mode": 33188,
      "new_path": "tests/drivers/counter/counter_basic_api/src/test_counter.c"
    }
  ]
}