#
# Copyright (c) 2014 Wind River Systems, Inc.
# Copyright (c) 2015-2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#

if SOC_QUARK_SE_C1000_SS

config SOC
	default quark_se_c1000_ss

config NUM_IRQ_PRIO_LEVELS
	# This processor supports only 2 priority levels:
	# 0 for Fast Interrupts (FIRQs) and 1 for Regular Interrupts (IRQs).
	default 2

config NUM_IRQS
	# must be > the highest interrupt number used
	default 68

config RGF_NUM_BANKS
	default 2

config SYS_CLOCK_HW_CYCLES_PER_SEC
	default 32000000

config HARVARD
	def_bool n

config FLASH_BASE_ADDRESS
	default 0x40000000

config FLASH_SIZE
	default 152

config SRAM_BASE_ADDRESS
	default 0x4000 if NSIM
	default 0xa8000400

config SRAM_SIZE
	default 16 if NSIM
	default 24

config ICCM_BASE_ADDRESS
	default 0xFFFFFFFF

config ICCM_SIZE
	default 0

config DCCM_BASE_ADDRESS
	default 0x80000000

config DCCM_SIZE
	default 8

config QMSI
	def_bool y

config QMSI_BUILTIN
	def_bool y

if RTC

config RTC_QMSI
	def_bool y

config RTC_0_IRQ_PRI
	default 2

endif # RTC

if PWM
config PWM_QMSI
	def_bool y
endif # PWM

if GPIO

config GPIO_QMSI
	def_bool y

if GPIO_QMSI

config GPIO_QMSI_0
	def_bool y

if GPIO_QMSI_0

config GPIO_QMSI_0_IRQ_PRI
	default 1

endif # GPIO_QMSI_0

config GPIO_QMSI_1
	def_bool y

if GPIO_QMSI_1

config GPIO_QMSI_1_IRQ_PRI
	default 1

endif # GPIO_QMSI_1

endif # GPIO_QMSI

config GPIO_QMSI_SS
	def_bool y

if GPIO_QMSI_SS

config GPIO_QMSI_SS_0
	def_bool y

if GPIO_QMSI_SS_0

config GPIO_QMSI_SS_0_IRQ_PRI
	default 1

endif # GPIO_QMSI_SS_0

config GPIO_QMSI_SS_1
	def_bool y

if GPIO_QMSI_SS_1

config GPIO_QMSI_SS_1_IRQ_PRI
	default 1

endif # GPIO_QMSI_SS_1

endif # GPIO_QMSI_SS

endif # GPIO


if I2C

config I2C_QMSI
	def_bool y

config I2C_0
	def_bool y

config I2C_0_IRQ_PRI
	default 1

config I2C_0_DEFAULT_CFG
	default 0x12

config I2C_1
	def_bool y

config I2C_1_IRQ_PRI
	default 1

config I2C_1_DEFAULT_CFG
	default 0x12

config I2C_SDA_SETUP
	default 2

config I2C_SDA_TX_HOLD
	default 16

config I2C_SDA_RX_HOLD
	default 24

config I2C_QMSI_SS
	def_bool y

config I2C_SS_0
	def_bool y

config I2C_SS_0_DEFAULT_CFG
	default 0x12

config I2C_SS_1
	def_bool y

config I2C_SS_1_DEFAULT_CFG
	default 0x12

config I2C_SS_SDA_SETUP
	default 2

config I2C_SS_SDA_HOLD
	default 10

endif # I2C

if ADC
config ADC_QMSI_SS
	def_bool y
endif


if UART_QMSI
config UART_QMSI_0
	def_bool y

if UART_QMSI_0

config UART_QMSI_0_IRQ_PRI
	default 3

endif # UART_QMSI_0

config UART_QMSI_1
	def_bool y

if UART_QMSI_1

config UART_QMSI_1_IRQ_PRI
	default 3

endif # UART_QMSI_1

endif # UART_QMSI

if UART_CONSOLE

config UART_CONSOLE_ON_DEV_NAME
	default "UART_1"

endif

if SPI

config SPI_QMSI
	def_bool y

config SPI_0
	def_bool y

config SPI_0_IRQ_PRI
	default 1

config SPI_1
	def_bool y

config SPI_1_IRQ_PRI
	default 1

config SPI_QMSI_SS
	def_bool y

config SPI_SS_0
	def_bool y

config SPI_SS_0_IRQ_PRI
	default 1

config SPI_SS_1
	def_bool y

config SPI_SS_1_IRQ_PRI
	default 1

endif # SPI

if AIO_COMPARATOR

config AIO_COMPARATOR_QMSI
	def_bool y

endif # AIO_COMPARATOR

if WATCHDOG

config WDT_QMSI
	def_bool y

config WDT_0_IRQ_PRI
	default 2

endif # WATCHDOG

if DMA

config DMA_QMSI
	def_bool y

endif # DMA

if COUNTER

config AON_COUNTER_QMSI
	def_bool y

config AON_TIMER_QMSI
	def_bool y

config AON_TIMER_IRQ_PRI
	default 2

endif # COUNTER

endif #SOC_QUARK_SE_C1000_SS