boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi

/*
 * Copyright 2024-2025 NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include "mimxrt1180_evk-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
	aliases {
		led0 = &red_led;
		sw0 = &user_button;
		pwm-led0 = &green_pwm_led;
		sdhc0 = &usdhc1;
		i2s-codec-tx = &sai1;
		i2s-tx = &sai1;
	};

	leds {
		compatible = "gpio-leds";

		red_led: led-2 {
			gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
			label = "User LED D7";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";

		user_button: button-1 {
			label = "User SW8";
			gpios = <&gpio1 4 (GPIO_PULL_UP | GPIO_ACTIVE_HIGH)>;
			zephyr,code = <INPUT_KEY_0>;
		};
	};

	pwmleds {
		compatible = "pwm-leds";

		green_pwm_led: green_pwm_led {
			pwms = <&flexpwm2_pwm1 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
		};
	};
};

&emdio {
	pinctrl-0 = <&emdio_default>;
	pinctrl-names = "default";
	status = "okay";

	phy0: phy@2 {
		compatible = "ethernet-phy";
		reg = <0x2>;
		status = "okay";
	};

	phy1: phy@5 {
		compatible = "realtek,rtl8211f";
		reg = <0x5>;
		status = "okay";
	};

	phy2: phy@4 {
		compatible = "realtek,rtl8211f";
		reg = <0x4>;
		status = "okay";
	};

	phy3: phy@7 {
		compatible = "realtek,rtl8211f";
		reg = <0x7>;
		status = "okay";
	};

	phy4: phy@3 {
		compatible = "ethernet-phy";
		reg = <0x3>;
		status = "okay";
	};
};

&enetc_psi0 {
	local-mac-address = [00 00 00 01 02 00];
	pinctrl-0 = <&eth4_default>;
	pinctrl-names = "default";
	phy-handle = <&phy4>;
	status = "okay";
};

/* Internal port */
&enetc_psi1 {
	local-mac-address = [00 00 00 01 03 00];
	status = "okay";
};

&switch {
	status = "okay";
};

&switch_port0 {
	zephyr,random-mac-address;
	pinctrl-0 = <&eth0_default>;
	pinctrl-names = "default";
	phy-handle = <&phy0>;
	phy-connection-type = "rmii";
	status = "okay";
};

&switch_port1 {
	zephyr,random-mac-address;
	pinctrl-0 = <&eth1_default>;
	pinctrl-names = "default";
	phy-handle = <&phy1>;
	phy-connection-type = "rgmii";
	status = "okay";
};

&switch_port2 {
	zephyr,random-mac-address;
	pinctrl-0 = <&eth2_default>;
	pinctrl-names = "default";
	phy-handle = <&phy2>;
	phy-connection-type = "rgmii";
	status = "okay";
};

&switch_port3 {
	zephyr,random-mac-address;
	pinctrl-0 = <&eth3_default>;
	pinctrl-names = "default";
	phy-handle = <&phy3>;
	phy-connection-type = "rgmii";
	status = "okay";
};

/* Internal port */
&switch_port4 {
	zephyr,random-mac-address;
	status = "okay";
};

&lpuart1 {
	status = "okay";
	current-speed = <115200>;
	pinctrl-0 = <&pinmux_lpuart1>;
	pinctrl-1 = <&pinmux_lpuart1_sleep>;
	pinctrl-names = "default", "sleep";
};

&lpuart12 {
	status = "okay";
	current-speed = <115200>;
	pinctrl-0 = <&pinmux_lpuart12>;
	pinctrl-1 = <&pinmux_lpuart12_sleep>;
	pinctrl-names = "default", "sleep";
};

&lpuart3 {
	pinctrl-0 = <&pinmux_lpuart3>;
	pinctrl-1 = <&pinmux_lpuart3_sleep>;
	pinctrl-names = "default", "sleep";
};

&user_button {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio4 {
	status = "okay";
};

&flexspi {
	pinctrl-0 = <&pinmux_flexspi1>;
	pinctrl-names = "default";
};

&flexspi {
	/*
	 * If booting with XIP from FlexSPI flash, the flash memory will be initialized by the
	 * bootloader in ROM.
	 * If not configured by the ROM bootloader, the user must ensure the w25q128jw QSPI device
	 * is enabled in the DTS, otherwise, the user must set 'status = "disabled";
	 * Note: mpu_region.c uses the status property from the DTS to configure the
	 * corresponding MPU settings.
	 */
	status = "disabled";
	ahb-prefetch;
	ahb-read-addr-opt;
	rx-clock-source = <1>;

	w25q128jw: w25q128jw@0 {
		compatible = "nxp,imx-flexspi-nor";
		size = <DT_SIZE_M(16*8)>;
		reg = <0>;
		spi-max-frequency = <DT_FREQ_M(133)>;
		status = "okay";
		jedec-id = [ef 60 18];
		erase-block-size = <DT_SIZE_K(4)>;
		write-block-size = <1>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			/*
			 * Partition sizes must be aligned
			 * to the flash memory sector size of 4KB.
			 */
			boot_partition: partition@0 {
				label = "mcuboot";
				reg = <0x00000000 DT_SIZE_K(128)>;
			};

			slot0_partition: partition@20000 {
				label = "image-0";
				reg = <0x00020000 DT_SIZE_M(7)>;
			};

			slot1_partition: partition@720000 {
				label = "image-1";
				reg = <0x00720000 DT_SIZE_M(7)>;
			};

			storage_partition: partition@E20000 {
				label = "storage";
				reg = <0x00E20000 (DT_SIZE_M(2) - DT_SIZE_K(128))>;
			};
		};
	};
};

&lpi2c2 {
	pinctrl-0 = <&pinmux_lpi2c2>;
	pinctrl-names = "default";
};

&lpi2c3 {
	pinctrl-0 = <&pinmux_lpi2c3>;
	pinctrl-names = "default";
};

&lpadc1 {
	pinctrl-0 = <&pinmux_lpadc1>;
	pinctrl-names = "default";
};

&flexcan3 {
	pinctrl-0 = <&pinmux_flexcan3>;
	pinctrl-names = "default";

	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&flexpwm2_pwm1 {
	status = "okay";
	pinctrl-0 = <&pinmux_flexpwm2>;
	pinctrl-names = "default";
};

&tpm5 {
	pinctrl-0 = <&pinmux_tpm5>;
	pinctrl-names = "default";
};

&i3c2 {
	pinctrl-0 = <&pinmux_i3c2>;
	pinctrl-names = "default";
};

p3t1755dp_ard_i3c_interface: &i3c2 {};

p3t1755dp_ard_i2c_interface: &lpi2c2 {};

&lpspi3 {
	dmas = <&edma4 1 13>, <&edma4 2 12>;
	dma-names = "rx", "tx";
	pinctrl-0 = <&pinmux_lpspi3>;
	pinctrl-names = "default";
};

&usdhc1 {
	status = "okay";
	detect-dat3;
	no-1-8-v;
	pwr-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
	pinctrl-0 = <&pinmux_usdhc1>;
	pinctrl-1 = <&pinmux_usdhc1_dat3_nopull>;
	pinctrl-names = "default", "nopull";

	sdmmc {
		compatible = "zephyr,sdmmc-disk";
		disk-name = "SD";
		status = "okay";
	};
};

&sai1 {
	pinctrl-0 = <&pinmux_sai1>;
	pinctrl-names = "default";
};

&lpi2c2 {
	pinctrl-0 = <&pinmux_lpi2c2>;
	pinctrl-names = "default";
	#address-cells = <1>;
	#size-cells = <0>;

	audio_codec: wm8962@1a {
		compatible = "wolfson,wm8962";
		reg = <0x1a>;
		clock-source = "MCLK";
		clocks = <&ccm IMX_CCM_SAI1_CLK 0x2004 4>;
		clock-names = "mclk";
	};

};