#  Copyright (C) 2019 Synopsys, Inc.
#  SPDX-License-Identifier: Apache-2.0
#

#
# Synopsys DesignWare ARC EM Software Development Platform
#

# Configure JTAG cable
# EM SDP has built-in FT2232 chip, which is similiar to Digilent HS-1.
interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_layout_init 0x0088 0x008b
ftdi_channel 0


# EM11D requires 10 MHz.
adapter_khz 10000

# ARCs support only JTAG.
transport select jtag

source [find cpu/arc/em.tcl]

set _CHIPNAME arc-em
set _TARGETNAME $_CHIPNAME.cpu

# EM SDP IDENTITY is 0x200444b1
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -expected-id 0x200444b1

set _coreid 0
set _dbgbase [expr 0x00000000 | ($_coreid << 13)]

target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME \
  -coreid 0 -dbgbase $_dbgbase -endian little

# There is no SRST, so do a software reset
$_TARGETNAME configure -event reset-assert "arc_em_reset $_TARGETNAME"

arc_em_init_regs