/*
 * Copyright (c) 2021, Microchip Technology Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;

#include <microchip/mec172xnsz.dtsi>
#include <microchip/mec172x/mec172xnsz-pinctrl.dtsi>

/ {
	model = "Microchip MEC172XEVB_ASSY6906 evaluation board";
	compatible = "microchip,mec172xevb_assy6906", "microchip,mec172xnsz";

	chosen {
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,console = &uart1;
	};

	aliases {
		led0 = &led4;
		led1 = &led3;
		i2c0 = &i2c_smb_0;
		i2c-0 = &i2c_smb_0;
		i2c1 = &i2c_smb_1;
		i2c7 = &i2c_smb_2;
		pwm-0 = &pwm0;
		watchdog0 = &wdog;
	};

	leds {
		compatible = "gpio-leds";
		led4: led_0 {
			/* GPIO241/CMP_VOUT0/PWM0_ALT on schematic,
			 * LED4 on silkscreen.
			 */
			gpios = <MCHP_GPIO_DECODE_241 GPIO_ACTIVE_HIGH>;
			label = "LED 4";
		};
		led3: led_1 {
			/* GPIO175/CMP_VOUT1/PWM8_ALT on schematic,
			 * LED5 on silkscreen.
			 */
			gpios = <MCHP_GPIO_DECODE_175 GPIO_ACTIVE_HIGH>;
			label = "LED 5";
		};
	};

	power-states {
		idle: idle {
			compatible = "zephyr,power-state";
			power-state-name = "suspend-to-idle";
			min-residency-us = <1000000>;
		};

		suspend_to_ram: suspend_to_ram {
			compatible = "zephyr,power-state";
			power-state-name = "suspend-to-ram";
			min-residency-us = <2000000>;
		};
	};
};

&cpu0 {
	clock-frequency = <96000000>;
	status = "okay";
	cpu-power-states = <&idle &suspend_to_ram>;
};

/* Initialize ECIA. Does not initialize child devices */
&ecia {
	status = "okay";
};

/* Enable aggregated GIRQ24 and GIRQ25 for eSPI virtual wires interrupts */
&girq24 {
	status = "okay";
};

&girq25 {
	status = "okay";
};

&rtimer {
	status = "okay";
};

&pcr {
	status = "okay";
};

&uart1 {
	status = "okay";
	current-speed = <115200>;
	pinctrl-0 = <&uart1_tx_gpio170 &uart1_rx_gpio171>;
	pinctrl-names = "default";
};

&adc0 {
	status = "okay";
	pinctrl-0 = <&adc00_gpio200 &adc03_gpio203
		     &adc04_gpio204 &adc05_gpio205>;
	pinctrl-1 = <&adc00_gpio200_sleep &adc03_gpio203_sleep
		     &adc04_gpio204_sleep &adc05_gpio205_sleep>;
	pinctrl-names = "default", "sleep";
};

&espi0 {
	status = "okay";
	pinctrl-0 = < &espi_reset_n_gpio061 &espi_cs_n_gpio066
		      &espi_alert_n_gpio063 &espi_clk_gpio065
		      &espi_io0_gpio070 &espi_io1_gpio071
		      &espi_io2_gpio072 &espi_io3_gpio073 >;
	pinctrl-names = "default";
};

/* enable various eSPI child devices (host facing) */
&kbc0 {
	status = "okay";
};

&acpi_ec0 {
	status = "okay";
};

&acpi_ec1 {
	status = "okay";
};

&emi0 {
	status = "okay";
};

&p80bd0 {
	status = "okay";
};

/* I2C */
&i2c_smb_0 {
	status = "okay";
	port_sel = <0>;

	pinctrl-0 = < &i2c00_scl_gpio004 &i2c00_sda_gpio003 >;
	pinctrl-names = "default";
};

&i2c00_scl_gpio004 {
	drive-open-drain;
	output-enable;
	output-high;
};

&i2c00_sda_gpio003 {
	drive-open-drain;
	output-enable;
	output-high;
};

&i2c_smb_1 {
	status = "okay";
	port_sel = <1>;
	pinctrl-0 = <&i2c01_scl_gpio131 &i2c01_sda_gpio130>;
	pinctrl-names = "default";

	pca9555@26 {
		compatible = "nxp,pca95xx";

		/* Depends on JP53 for device address.
		 * Pin 1-2 = A0, pin 3-4 = A1, pin 5-6 = A2.
		 * Address is: 0100<A2><A1><A0>b.
		 *
		 * Default has pin 1-2 on JP53 connected,
		 * resulting in device address 0x26.
		 */
		reg = <0x26>;

		gpio-controller;
		#gpio-cells = <2>;
	};
};

&i2c01_scl_gpio131 {
	drive-open-drain;
	output-enable;
	output-high;
};

&i2c01_sda_gpio130 {
	drive-open-drain;
	output-enable;
	output-high;
};

&i2c_smb_2 {
	status = "okay";
	port_sel = <7>;
	pinctrl-0 = <&i2c07_scl_gpio013 &i2c07_sda_gpio012>;
	pinctrl-names = "default";
};

&i2c07_scl_gpio013 {
	drive-open-drain;
	output-enable;
	output-high;
};

&i2c07_sda_gpio012 {
	drive-open-drain;
	output-enable;
	output-high;
};

&spi0 {
	status = "okay";
	compatible = "microchip,xec-qmspi-ldma";
	clock-frequency = <4000000>;
	lines = <4>;
	chip-select = <0>;

	pinctrl-0 = < &shd_cs0_n_gpio055
		      &shd_clk_gpio056
		      &shd_io0_gpio223
		      &shd_io1_gpio224
		      &shd_io2_gpio227
		      &shd_io3_gpio016 >;
	pinctrl-names = "default";
};

&kscan0 {
	status = "okay";

	pinctrl-0 = < &ksi0_gpio017
		      &ksi1_gpio020
		      &ksi2_gpio021
		      &ksi3_gpio026
		      &ksi4_gpio027
		      &ksi5_gpio030
		      &ksi6_gpio031
		      &ksi7_gpio032
		      &kso00_gpio040
		      &kso01_gpio045
		      &kso02_gpio046
		      &kso03_gpio047
		      &kso04_gpio107
		      &kso05_gpio112
		      &kso06_gpio113
		      &kso07_gpio120
		      &kso08_gpio121
		      &kso09_gpio122
		      &kso10_gpio123
		      &kso11_gpio124
		      &kso12_gpio125
		      &kso13_gpio126 >;
	pinctrl-names = "default";
};

&ksi0_gpio017 {
	bias-pull-up;
};

&ksi1_gpio020 {
	bias-pull-up;
};

&ksi2_gpio021 {
	bias-pull-up;
};

&ksi3_gpio026 {
	bias-pull-up;
};

&ksi4_gpio027 {
	bias-pull-up;
};

&ksi5_gpio030 {
	bias-pull-up;
};

&ksi6_gpio031 {
	bias-pull-up;
};

&ksi7_gpio032 {
	bias-pull-up;
};

&pwm0 {
	status = "okay";
	pinctrl-0 = <&pwm0_gpio053>;
	pinctrl-names = "default";
};

&tach0 {
	status = "okay";
	pinctrl-0 = <&tach0_gpio050>;
	pinctrl-names = "default";
};

&ps2_0 {
	status = "okay";
	pinctrl-0 = <&ps2_clk0a_gpio114 &ps2_dat0a_gpio115>;
	pinctrl-names = "default";
};

&timer5 {
	status = "okay";
};