/dts-v1/;

#include <mem.h>

#define DT_FLASH_SIZE		DT_SIZE_K(4092)

#if XIP
	#define DT_SRAM_SIZE		DT_SIZE_K(4096)
#else
	#define DT_SRAM_SIZE		DT_SIZE_K(8188)
#endif

#include <ia32.dtsi>

/ {
	model = "QEMU X86";
	compatible = "intel,ia32";

	aliases {
		uart-0 = &uart0;
		uart-1 = &uart1;
	};

	chosen {
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,bt-uart = &uart1;
		zephyr,uart-pipe = &uart1;
		zephyr,bt-mon-uart = &uart1;
	};

	soc {
		eth0: eth@febc0000 {
			compatible = "intel,e1000";
			reg = <0xfebc0000 0x100>;
			label = "eth0";
			interrupts = <11 IRQ_TYPE_EDGE_RISING 3>;
			interrupt-parent = <&intc>;

			status = "ok";
		};
	};
};

&uart0 {
	status = "ok";
	current-speed = <115200>;
};

&uart1 {
	status = "ok";
	current-speed = <115200>;
};