)]}'
{
  "commit": "90ac56100c02f1994ad821a191c20be3ed88bffa",
  "tree": "777295fed26964fecfec11c58bbee15728aae7b1",
  "parents": [
    "dbe69d9031e26242affc7a4ff1be10f5a721380e"
  ],
  "author": {
    "name": "Daniel Leung",
    "email": "daniel.leung@intel.com",
    "time": "Wed Mar 11 11:50:23 2020 -0700"
  },
  "committer": {
    "name": "Anas Nashif",
    "email": "anas.nashif@intel.com",
    "time": "Wed Mar 11 21:16:16 2020 -0400"
  },
  "message": "dts: mec1501hsz: add GIRQ fields for RTOS timer\n\nThis specifies the GIRQ related fields to the mec1501hsz\ndevice tree file.\n\nSigned-off-by: Daniel Leung \u003cdaniel.leung@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e2f8e6909720d8c2ae6dce3ea426fb29222bf549",
      "old_mode": 33188,
      "old_path": "dts/arm/microchip/mec1501hsz.dtsi",
      "new_id": "7a228a892c1844278036590708e274d9f8cf4efd",
      "new_mode": 33188,
      "new_path": "dts/arm/microchip/mec1501hsz.dtsi"
    }
  ]
}