)]}'
{
  "commit": "95179b24c7e553a1f5fd2398be7d04d96d7cc12a",
  "tree": "a18bc7d618529ea17fa31308756245ee60d9c166",
  "parents": [
    "541c0959c3d30206fd2c8daf89def11f2a249f12"
  ],
  "author": {
    "name": "Khaoula Bidani",
    "email": "khaoula.bidani-ext@st.com",
    "time": "Tue Feb 04 17:19:24 2025 +0100"
  },
  "committer": {
    "name": "Benjamin Cabé",
    "email": "kartben@gmail.com",
    "time": "Fri Feb 07 10:25:52 2025 +0100"
  },
  "message": "tests : clock_control: clean \"STM32_SRC_SYSCLK\"\n\nclean up usage of usage \"#ifdef STM32_SRC_SYSCLK\"\nand code under the \"#else\" from\ntest_stm32_clock_configuration_adc.c.\n\nSigned-off-by: Khaoula Bidani \u003ckhaoula.bidani-ext@st.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "0225c495a904caa889d0aa5bc3acaaf5a872fe49",
      "old_mode": 33188,
      "old_path": "tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/test_stm32_clock_configuration_adc.c",
      "new_id": "43c6bae18ea381ea51056211e761ea60c36db037",
      "new_mode": 33188,
      "new_path": "tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/test_stm32_clock_configuration_adc.c"
    }
  ]
}