/*
 * Copyright (c) 2018 Philémon Jaermann
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <st/f4/stm32f401.dtsi>

/ {
	soc {
		usart3: serial@40004800 {
			compatible = "st,stm32-usart", "st,stm32-uart";
			reg = <0x40004800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
			interrupts = <39 0>;
			status = "disabled";
			label = "UART_3";
		};

		uart4: serial@40004c00 {
			compatible ="st,stm32-uart";
			reg = <0x40004c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
			interrupts = <52 0>;
			status = "disabled";
			label = "UART_4";
		};

		usbotg_fs: usb@50000000 {
			num-bidir-endpoints = <6>;
		};

		usbotg_hs: usb@40040000 {
			compatible = "st,stm32-otghs";
			reg = <0x40040000 0x40000>;
			interrupts = <77 0>, <74 0>, <75 0>;
			interrupt-names = "otghs", "ep1_out", "ep1_in";
			num-bidir-endpoints = <9>;
			ram-size = <4096>;
			maximum-speed = "full-speed";
			phys = <&otghs_fs_phy>;
			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
			status = "disabled";
			label= "OTGHS";
		};
	};

	otghs_fs_phy: otghs_fs_phy {
		compatible = "usb-nop-xceiv";
		#phy-cells = <0>;
		label = "OTGHS_FS_PHY";
	};
};