| commit | 9ab7354a461db0fb0a157d8d8a69dba378f60cfb | [log] [tgz] |
|---|---|---|
| author | Chad Karaginides <quic_chadk@quicinc.com> | Fri May 26 07:38:34 2023 -0700 |
| committer | Anas Nashif <anas.nashif@intel.com> | Fri May 26 13:51:50 2023 -0400 |
| tree | 8cca993fb0bc8505033555ec3edff9edd37b47f9 | |
| parent | 53525bb9c5cc096a000dbb41ed4cb2e7037dccd8 [diff] |
arch: arm64: SCR_EL3 EEL2 Enablement For secure EL2 to be entered the EEL2 bit in SCR_EL3 must be set. This should only be set if Zephyr has not been configured for NS mode only, if the device is currently in secure EL3, and if secure EL2 is supported via the SEL2 bit in AA64PFRO_EL1. Added logic to enable EEL2 if all conditions are met. Signed-off-by: Chad Karaginides <quic_chadk@quicinc.com>