/* SoC level DTS fixup file */

#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS

/* CMSDK APB Timers */
#define CMSDK_APB_TIMER0			ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
#define CMSDK_APB_TIMER_0_IRQ			ARM_CMSDK_TIMER_40000000_IRQ_0

#define CMSDK_APB_TIMER1			ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
#define CMSDK_APB_TIMER_1_IRQ IRQ_TIMER1	ARM_CMSDK_TIMER_40001000_IRQ_0

/* CMSDK APB Dual Timer */
#define CMSDK_APB_DTIMER			ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
#define CMSDK_APB_DUALTIMER_IRQ			ARM_CMSDK_DTIMER_40002000_IRQ_0

/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
#define CMSDK_APB_UART0				ARM_CMSDK_UART_40004000_BASE_ADDRESS
#define CMSDK_APB_UART_0_IRQ_TX			ARM_CMSDK_UART_40004000_IRQ_0
#define CMSDK_APB_UART_0_IRQ_RX			ARM_CMSDK_UART_40004000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI	ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT0_BAUD_RATE	ARM_CMSDK_UART_40004000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT0_NAME	ARM_CMSDK_UART_40004000_LABEL

#define CMSDK_APB_UART1				ARM_CMSDK_UART_40005000_BASE_ADDRESS
#define CMSDK_APB_UART_1_IRQ_TX			ARM_CMSDK_UART_40005000_IRQ_0
#define CMSDK_APB_UART_1_IRQ_RX			ARM_CMSDK_UART_40005000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI	ARM_CMSDK_UART_40005000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT1_BAUD_RATE	ARM_CMSDK_UART_40005000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT1_NAME	ARM_CMSDK_UART_40005000_LABEL

#define CMSDK_APB_UART2				ARM_CMSDK_UART_40006000_BASE_ADDRESS
#define CMSDK_APB_UART_2_IRQ_TX			ARM_CMSDK_UART_40006000_IRQ_0
#define CMSDK_APB_UART_2_IRQ_RX			ARM_CMSDK_UART_40006000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT2_IRQ_PRI	ARM_CMSDK_UART_40006000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT2_BAUD_RATE	ARM_CMSDK_UART_40006000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT2_NAME	ARM_CMSDK_UART_40006000_LABEL

#define CMSDK_APB_UART3				ARM_CMSDK_UART_40007000_BASE_ADDRESS
#define CMSDK_APB_UART_3_IRQ_TX			ARM_CMSDK_UART_40007000_IRQ_0
#define CMSDK_APB_UART_3_IRQ_RX			ARM_CMSDK_UART_40007000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT3_IRQ_PRI	ARM_CMSDK_UART_40007000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT3_BAUD_RATE	ARM_CMSDK_UART_40007000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT3_NAME	ARM_CMSDK_UART_40007000_LABEL

#define CMSDK_APB_UART4				ARM_CMSDK_UART_40009000_BASE_ADDRESS
#define CMSDK_APB_UART_4_IRQ_TX			ARM_CMSDK_UART_40009000_IRQ_0
#define CMSDK_APB_UART_4_IRQ_RX			ARM_CMSDK_UART_40009000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT4_IRQ_PRI	ARM_CMSDK_UART_40009000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT4_BAUD_RATE	ARM_CMSDK_UART_40009000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT4_NAME	ARM_CMSDK_UART_40009000_LABEL

/* CMSDK APB Watchdog */
#define CMSDK_APB_WDOG				ARM_CMSDK_WATCHDOG_40008000_BASE_ADDRESS

/* CMSDK AHB General Purpose Input/Output (GPIO) */
#define CMSDK_AHB_GPIO0				ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
#define IRQ_PORT0_ALL				ARM_CMSDK_GPIO_40010000_IRQ_0

#define CMSDK_AHB_GPIO1				ARM_CMSDK_GPIO_40011000_BASE_ADDRESS
#define IRQ_PORT1_ALL				ARM_CMSDK_GPIO_40011000_IRQ_0

#define CMSDK_AHB_GPIO2				ARM_CMSDK_GPIO_40012000_BASE_ADDRESS
#define IRQ_PORT2_ALL				ARM_CMSDK_GPIO_40012000_IRQ_0

#define CMSDK_AHB_GPIO3				ARM_CMSDK_GPIO_40013000_BASE_ADDRESS
#define IRQ_PORT3_ALL				ARM_CMSDK_GPIO_40013000_IRQ_0

/* I2C SBCon */
#define I2C_SBCON_0_BASE_ADDR			ARM_VERSATILE_I2C_40022000_BASE_ADDRESS
#define I2C_SBCON_0_NAME			ARM_VERSATILE_I2C_40022000_LABEL

#define I2C_SBCON_1_BASE_ADDR			ARM_VERSATILE_I2C_40023000_BASE_ADDRESS
#define I2C_SBCON_1_NAME			ARM_VERSATILE_I2C_40023000_LABEL

#define I2C_SBCON_2_BASE_ADDR			ARM_VERSATILE_I2C_40029000_BASE_ADDRESS
#define I2C_SBCON_2_NAME			ARM_VERSATILE_I2C_40029000_LABEL

#define I2C_SBCON_3_BASE_ADDR			ARM_VERSATILE_I2C_4002A000_BASE_ADDRESS
#define I2C_SBCON_3_NAME			ARM_VERSATILE_I2C_4002A000_LABEL

/* End of SoC Level DTS fixup file */