/*
 * Copyright (c) 2023 Nobleo Technology
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>

&adc1 {
	dmas = < &dmamux1 0 9 (STM32_DMA_PERIPH_TO_MEMORY |
		STM32_DMA_MEM_INC |  STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS) >;
	dma-names = "dmamux";

	#address-cells = <1>;
	#size-cells = <0>;

	channel@1 {
		reg = <1>;
		zephyr,gain = "ADC_GAIN_1";
		zephyr,reference = "ADC_REF_INTERNAL";
		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
		zephyr,resolution = <12>;
	};
};

/* ADC driver expects a buffer in a non-cachable memory region */
&sram4 {
	zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
};

&dma1 {
	status = "okay";
};

test_dma: &dmamux1 {
	status = "okay";
};