diff --git a/drivers/mspi/mspi_dw.c b/drivers/mspi/mspi_dw.c
index e8c9a81..cefcb5e 100644
--- a/drivers/mspi/mspi_dw.c
+++ b/drivers/mspi/mspi_dw.c
@@ -114,6 +114,7 @@
 	uint8_t rx_fifo_threshold;
 	DECLARE_REG_ACCESS();
 	bool sw_multi_periph;
+	enum mspi_op_mode op_mode;
 };
 
 /* Register access helpers. */
@@ -1748,6 +1749,7 @@
 
 static int dev_init(const struct device *dev)
 {
+	struct mspi_dw_data *dev_data = dev->data;
 	const struct mspi_dw_config *dev_config = dev->config;
 	const struct gpio_dt_spec *ce_gpio;
 	int rc;
@@ -1756,11 +1758,12 @@
 
 	vendor_specific_init(dev);
 
+	dev_data->ctrlr0 |= FIELD_PREP(CTRLR0_SSI_IS_MST_BIT,
+				       dev_config->op_mode == MSPI_OP_MODE_CONTROLLER);
+
 	dev_config->irq_config();
 
 #if defined(CONFIG_MULTITHREADING)
-	struct mspi_dw_data *dev_data = dev->data;
-
 	dev_data->dev = dev;
 	k_sem_init(&dev_data->finished, 0, 1);
 	k_sem_init(&dev_data->cfg_lock, 1, 1);
@@ -1885,6 +1888,7 @@
 		DEFINE_REG_ACCESS(inst)					\
 		.sw_multi_periph =					\
 			DT_INST_PROP(inst, software_multiperipheral),	\
+		.op_mode = DT_INST_STRING_TOKEN(inst, op_mode),		\
 	};								\
 	DEVICE_DT_INST_DEFINE(inst,					\
 		dev_init, PM_DEVICE_DT_INST_GET(inst),			\
diff --git a/drivers/mspi/mspi_dw.h b/drivers/mspi/mspi_dw.h
index 28e4bed..894bee4 100644
--- a/drivers/mspi/mspi_dw.h
+++ b/drivers/mspi/mspi_dw.h
@@ -19,6 +19,7 @@
  */
 
 /* CTRLR0 - Control Register 0 */
+#define CTRLR0_SSI_IS_MST_BIT	BIT(31)
 #define CTRLR0_SPI_FRF_MASK	COND_CODE_1(SSI_VERSION_2, GENMASK(22, 21), GENMASK(23, 22))
 #define CTRLR0_SPI_FRF_STANDARD	0UL
 #define CTRLR0_SPI_FRF_DUAL	1UL
diff --git a/dts/bindings/mspi/nordic,nrf-exmif.yaml b/dts/bindings/mspi/nordic,nrf-exmif.yaml
index 294254a..4e46e5d 100644
--- a/dts/bindings/mspi/nordic,nrf-exmif.yaml
+++ b/dts/bindings/mspi/nordic,nrf-exmif.yaml
@@ -6,3 +6,7 @@
 compatible: "nordic,nrf-exmif"
 
 include: snps,designware-ssi.yaml
+
+properties:
+  op-mode:
+    default: "MSPI_OP_MODE_CONTROLLER"