/*
 * Copyright (c) 2018, NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <mem.h>
#include <arm/armv7-m.dtsi>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/rdc/imx_rdc.h>
#include <dt-bindings/i2c/i2c.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
			status = "disabled";
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-m4f";
			reg = <1>;
		};
	};

	tcml:memory@1fff8000 {
		compatible = "nxp,imx-itcm";
		reg = <0x1fff8000 DT_SIZE_K(32)>;
		label = "TCML";
	};

	tcmu:memory@20000000 {
		compatible = "nxp,imx-dtcm";
		reg = <0x20000000 DT_SIZE_K(32)>;
		label = "TCMU";
	};

	ocram_s:memory@208f8000 {
		device_type = "memory";
		compatible = "nxp,imx-sys-bus";
		reg = <0x208f8000 DT_SIZE_K(16)>;
		label = "OCRAM_S";
	};

	ocram:memory@20900000 {
		device_type = "memory";
		compatible = "nxp,imx-sys-bus";
		reg = <0x20900000 DT_SIZE_K(128)>;
		label = "OCRAM";
	};

	ddr:memory@80000000 {
		device_type = "memory";
		compatible = "nxp,imx-sys-bus";
		reg = <0x80000000 0x60000000>;
		label = "DDR";
	};

	flash:memory@DT_FLASH_ADDR {
		compatible = "soc-nv-flash";
		reg = <DT_ADDR(DT_FLASH_ADDR) DT_FLASH_SIZE>;
	};

	sram:memory@DT_SRAM_ADDR {
		reg = <DT_ADDR(DT_SRAM_ADDR) DT_SRAM_SIZE>;
	};

	soc {
		uart1:uart@42020000 {
			compatible = "nxp,imx-uart";
			reg = <0x42020000 0x00004000>;
			interrupts = <26 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "UART_1";
			status = "disabled";
		};

		uart2:uart@421e8000 {
			compatible = "nxp,imx-uart";
			reg = <0x421e8000 0x00004000>;
			interrupts = <27 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "UART_2";
			status = "disabled";
		};

		uart3:uart@421ec000 {
			compatible = "nxp,imx-uart";
			reg = <0x421ec000 0x00004000>;
			interrupts = <28 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "UART_3";
			status = "disabled";
		};

		uart4:uart@421f0000 {
			compatible = "nxp,imx-uart";
			reg = <0x421f0000 0x00004000>;
			interrupts = <29 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "UART_4";
			status = "disabled";
		};

		uart5:uart@421f4000 {
			compatible = "nxp,imx-uart";
			reg = <0x421f4000 0x00004000>;
			interrupts = <30 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "UART_5";
			status = "disabled";
		};

		uart6:uart@422a0000 {
			compatible = "nxp,imx-uart";
			reg = <0x422a0000 0x00004000>;
			interrupts = <17 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "UART_6";
			status = "disabled";
		};

		gpio1:gpio@4209c000 {
			compatible = "nxp,imx-gpio";
			reg = <0x4209c000 0x4000>;
			interrupts = <66 0>, <67 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "GPIO_1";
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		gpio2:gpio@420a0000 {
			compatible = "nxp,imx-gpio";
			reg = <0x420a0000 0x4000>;
			interrupts = <68 0>, <69 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "GPIO_2";
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		gpio3:gpio@420a4000 {
			compatible = "nxp,imx-gpio";
			reg = <0x420a4000 0x4000>;
			interrupts = <70 0>, <71 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "GPIO_3";
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		gpio4:gpio@420a8000 {
			compatible = "nxp,imx-gpio";
			reg = <0x420a8000 0x4000>;
			interrupts = <72 0>, <73 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "GPIO_4";
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		gpio5:gpio@420ac000 {
			compatible = "nxp,imx-gpio";
			reg = <0x420ac000 0x4000>;
			interrupts = <74 0>, <75 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "GPIO_5";
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		gpio6:gpio@420b0000 {
			compatible = "nxp,imx-gpio";
			reg = <0x420b0000 0x4000>;
			interrupts = <76 0>, <77 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "GPIO_6";
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		gpio7:gpio@420b4000 {
			compatible = "nxp,imx-gpio";
			reg = <0x420b4000 0x4000>;
			interrupts = <78 0>, <79 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "GPIO_7";
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		mub:mu@4229c000 {
			compatible = "nxp,imx-mu";
			reg = <0x4229c000 0x4000>;
			interrupts = <99 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "MU_B";
			status = "disabled";
		};

		epit1:epit@420d0000 {
			compatible = "nxp,imx-epit";
			reg = <0x420d0000 0x4000>;
			interrupts = <56 0>;
			prescaler = <0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "EPIT_1";
			status = "disabled";
		};

		epit2:epit@420d4000 {
			compatible = "nxp,imx-epit";
			reg = <0x420d4000 0x4000>;
			interrupts = <57 0>;
			prescaler = <0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "EPIT_2";
			status = "disabled";
		};

		i2c1: i2c@421a0000 {
			compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x421a0000 0x4000>;
			interrupts = <36 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "I2C_1";
			status = "disabled";
		};

		i2c2: i2c@421a4000 {
			compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x421a4000 0x4000>;
			interrupts = <37 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "I2C_2";
			status = "disabled";
		};

		i2c3: i2c@421a8000 {
			compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x421a8000 0x4000>;
			interrupts = <38 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "I2C_3";
			status = "disabled";
		};

		i2c4: i2c@421f8000 {
			compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x421f8000 0x4000>;
			interrupts = <35 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "I2C_4";
			status = "disabled";
		};

		pwm1: pwm@42080000 {
			compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
			reg = <0x42080000 0x4000>;
			interrupts = <83 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "PWM_1";
			prescaler = <0>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm2: pwm@42084000 {
			compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
			reg = <0x42084000 0x4000>;
			interrupts = <84 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "PWM_2";
			prescaler = <0>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm3: pwm@42088000 {
			compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
			reg = <0x42088000 0x4000>;
			interrupts = <85 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "PWM_3";
			prescaler = <0>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm4: pwm@4208c000 {
			compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
			reg = <0x4208c000 0x4000>;
			interrupts = <86 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "PWM_4";
			prescaler = <0>;
			#pwm-cells = <2>;
			status = "disabled";
		};


		pwm5: pwm@422a4000 {
			compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
			reg = <0x422a4000 0x4000>;
			interrupts = <83 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "PWM_5";
			prescaler = <0>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm6: pwm@422a8000 {
			compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
			reg = <0x422a8000 0x4000>;
			interrupts = <84 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "PWM_6";
			prescaler = <0>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm7: pwm@422ac000 {
			compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
			reg = <0x422ac000 0x4000>;
			interrupts = <85 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "PWM_7";
			prescaler = <0>;
			#pwm-cells = <2>;
			status = "disabled";
		};

		pwm8: pwm@422ab000 {
			compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
			reg = <0x422ab000 0x4000>;
			interrupts = <86 0>;
			rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW)|\
			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
					       RDC_DOMAIN_PERM_RW))>;
			label = "PWM_8";
			prescaler = <0>;
			#pwm-cells = <2>;
			status = "disabled";
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <4>;
};