)]}'
{
  "commit": "a7f9ebe9d50ce6f2fc2b7de19ee5fe6c8c7b85fe",
  "tree": "8e12ae3bf9cb52b39b2ed793553a2b1c8efe44f5",
  "parents": [
    "5cf65452c339e1948293e564ede01e7ed53818f9"
  ],
  "author": {
    "name": "Huaqi Fang",
    "email": "578567190@qq.com",
    "time": "Mon Apr 07 16:04:13 2025 +0800"
  },
  "committer": {
    "name": "Benjamin Cabé",
    "email": "kartben@gmail.com",
    "time": "Wed Apr 16 08:10:47 2025 +0200"
  },
  "message": "driver: interrupt_controller: intc_clic: support 32 and 64 bit riscv cpu\n\nThis patch is used to provide clic(eclic) in 64 bit riscv cpu support,\nsince in 64 bit riscv cpu, the clic irq table entry is also 64 bit,\nso we need to use ld/sd to do irq entry load and store\n\nSigned-off-by: Huaqi Fang \u003c578567190@qq.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "720b829e21465fe1b06e795dd12c0b23b7976d96",
      "old_mode": 33188,
      "old_path": "drivers/interrupt_controller/intc_clic.S",
      "new_id": "3a03b8d417c0f97d774961eab6418aa79965347c",
      "new_mode": 33188,
      "new_path": "drivers/interrupt_controller/intc_clic.S"
    }
  ]
}