boards/arm/96b_nitrogen/96b_nitrogen-pinctrl.dtsi

/*
 * Copyright (c) 2022 Nordic Semiconductor
 * SPDX-License-Identifier: Apache-2.0
 */

&pinctrl {
	uart0_default: uart0_default {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 13)>,
				<NRF_PSEL(UART_RX, 0, 15)>,
				<NRF_PSEL(UART_RTS, 0, 12)>,
				<NRF_PSEL(UART_CTS, 0, 14)>;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 13)>,
				<NRF_PSEL(UART_RX, 0, 15)>,
				<NRF_PSEL(UART_RTS, 0, 12)>,
				<NRF_PSEL(UART_CTS, 0, 14)>;
			low-power-enable;
		};
	};

	i2c0_default: i2c0_default {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 20)>,
				<NRF_PSEL(TWIM_SCL, 0, 22)>;
		};
	};

	i2c0_sleep: i2c0_sleep {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 20)>,
				<NRF_PSEL(TWIM_SCL, 0, 22)>;
			low-power-enable;
		};
	};

	spi1_default: spi1_default {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 26)>,
				<NRF_PSEL(SPIM_MOSI, 0, 23)>,
				<NRF_PSEL(SPIM_MISO, 0, 25)>;
		};
	};

	spi1_sleep: spi1_sleep {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 26)>,
				<NRF_PSEL(SPIM_MOSI, 0, 23)>,
				<NRF_PSEL(SPIM_MISO, 0, 25)>;
			low-power-enable;
		};
	};

};