blob: 8e47b5d13c61cbc58d07186c7e1b1ff14c47f74e [file] [log] [blame]
/*
* Copyright (c) 2022 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 5)>,
<NRF_PSEL(UART_RX, 0, 11)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 5)>,
<NRF_PSEL(UART_RX, 0, 11)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 29)>,
<NRF_PSEL(TWIM_SCL, 0, 28)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 29)>,
<NRF_PSEL(TWIM_SCL, 0, 28)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 4)>,
<NRF_PSEL(SPIM_MOSI, 0, 6)>,
<NRF_PSEL(SPIM_MISO, 0, 7)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 4)>,
<NRF_PSEL(SPIM_MOSI, 0, 6)>,
<NRF_PSEL(SPIM_MISO, 0, 7)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 16)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 18)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 16)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 18)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 22)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 22)>;
low-power-enable;
};
};
};