boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common_0_14_0.dtsi

/*
 * Copyright (c) 2021 Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: Apache-2.0
 */

&interface_to_nrf52840 {
	gpio-map = <0 0 &gpio0 17 0>,
		   <1 0 &gpio0 18 0>,
		   <2 0 &gpio0 19 0>,
		   <3 0 &gpio0 21 0>,
		   <4 0 &gpio0 22 0>,
		   <5 0 &gpio0 23 0>,
		   /* 6: COEX0 */
		   /* 7: COEX1 */
		   /* 8: COEX2 */
		   <9 0 &gpio0 24 0>;
};

&nrf52840_reset {
	gpios = <&interface_to_nrf52840 9 GPIO_ACTIVE_LOW>;
};

&i2c2 {
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;

	pcal6408a: pcal6408a@20 {
		compatible = "nxp,pcal6408a";
		status = "disabled";
		reg = <0x20>;
		label = "GPIO_P0";
		gpio-controller;
		#gpio-cells = <2>;
		ngpios = <8>;
		int-gpios = <&gpio0 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
	};
};

&pinctrl {
	spi3_default_v14: spi3_default_v14 {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 13)>,
				<NRF_PSEL(SPIM_MOSI, 0, 11)>,
				<NRF_PSEL(SPIM_MISO, 0, 12)>;
		};
	};

	spi3_sleep_v14: spi3_sleep_v14 {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 13)>,
				<NRF_PSEL(SPIM_MOSI, 0, 11)>,
				<NRF_PSEL(SPIM_MISO, 0, 12)>;
			low-power-enable;
		};
	};
};

&spi3 {
	status = "okay";
	pinctrl-0 = <&spi3_default_v14>;
	pinctrl-1 = <&spi3_sleep_v14>;
	pinctrl-names = "default", "sleep";
	cs-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
	mx25r64: mx25r6435f@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <8000000>;
		label = "MX25R64";
		jedec-id = [c2 28 17];
		sfdp-bfp = [
			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 68 44
			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
		];
		size = <67108864>;
		has-dpd;
		t-enter-dpd = <10000>;
		t-exit-dpd = <35000>;
	};
};