blob: caa552b91671a7b0b6395d074a8d5a77729b6d03 [file] [log] [blame]
/*
* Copyright (c) 2022 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 5)>,
<NRF_PSEL(UART_RX, 0, 29)>,
<NRF_PSEL(UART_RTS, 0, 31)>,
<NRF_PSEL(UART_CTS, 0, 23)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 5)>,
<NRF_PSEL(UART_RX, 0, 29)>,
<NRF_PSEL(UART_RTS, 0, 31)>,
<NRF_PSEL(UART_CTS, 0, 23)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
<NRF_PSEL(TWIM_SCL, 0, 17)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
<NRF_PSEL(TWIM_SCL, 0, 17)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 7)>,
<NRF_PSEL(SPIM_MOSI, 1, 0)>,
<NRF_PSEL(SPIM_MISO, 0, 15)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 7)>,
<NRF_PSEL(SPIM_MOSI, 1, 0)>,
<NRF_PSEL(SPIM_MISO, 0, 15)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 3)>,
<NRF_PSEL(SPIM_MOSI, 0, 28)>,
<NRF_PSEL(SPIM_MISO, 0, 9)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 3)>,
<NRF_PSEL(SPIM_MOSI, 0, 28)>,
<NRF_PSEL(SPIM_MISO, 0, 9)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 7)>,
<NRF_PSEL(SPIM_MOSI, 0, 1)>,
<NRF_PSEL(SPIM_MISO, 1, 0)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 7)>,
<NRF_PSEL(SPIM_MOSI, 0, 1)>,
<NRF_PSEL(SPIM_MISO, 1, 0)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>,
<NRF_PSEL(PWM_OUT1, 1, 1)>,
<NRF_PSEL(PWM_OUT2, 1, 0)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>,
<NRF_PSEL(PWM_OUT1, 1, 1)>,
<NRF_PSEL(PWM_OUT2, 1, 0)>;
low-power-enable;
};
};
};