/*
 * Copyright (c) 2022 STMicroelectronics
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/*
 * Warning: This overlay performs configuration from clean sheet.
 * It is assumed that it is applied after clear_clocks.overlay file.
 */

&clk_hsi {
	status = "okay";
};

&pll {
	div-m = <8>;
	mul-n = <200>;
	div-p = <4>;
	clocks = <&clk_hsi>;
	status = "okay";
};

&rcc {
	clocks = <&pll>;
	ahb-prescaler = <2>;
	clock-frequency = <DT_FREQ_M(50)>; /* Pll Output (100) / AHB prescaler */
	apb1-prescaler = <2>;
	apb2-prescaler = <2>;
};