| # Copyright (c) 2021 Henrik Brix Andersen <henrik@brixandersen.dk> | |
| # SPDX-License-Identifier: Apache-2.0 | |
| config SOC_NEORV32 | |
| bool | |
| help | |
| NEORV32 Processor (SoC). | |
| The NEORV32 CPU implementation must have the following RISC-V ISA | |
| extensions enabled in order to support Zephyr: | |
| - Zicsr (always enabled) | |
| - Zifencei (always enabled) | |
| - Zicntr | |
| config SOC | |
| default "neorv32" if SOC_NEORV32 |